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tenbahttenbaht
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consolitate the jump table, improve comments, more fine-grained reuse of code
1 parent 20cc444 commit 77a6f48

1 file changed

Lines changed: 74 additions & 229 deletions

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‎test/pinmode/pinmode-asm.c‎

Lines changed: 74 additions & 229 deletions
Original file line numberDiff line numberDiff line change
@@ -56,282 +56,127 @@ __asm
5656
ld xl, a
5757
addw x, #(_digital_pin_to_port_PGM + 0)
5858
ld a, (x) ; port-ID. Z-Flag wird gesetzt
59-
jreq 002$
59+
jreq 010$
6060

6161

6262
;
6363
; Zuordung port-ID => Port-Addresse
6464
;
6565
; x = (GPIO_TypeDef *) portOutputRegister(port)
6666
;
67-
6867
00102$:
6968
clrw x
7069
sll a ; 8 bit shift is sufficient
7170
ld xl, a
7271
addw x, #(_port_to_output_PGM + 0)
7372
ldw x, (x) ; jetzt ist gpio in x
7473

74+
;
75+
; jump table/switch statement for mode parameter
76+
;
77+
ld a, (4, sp)
78+
jreq 000$
79+
dec a
80+
jreq 010$
81+
dec a
82+
jreq 020$
83+
dec a
84+
jreq 030$
85+
dec a ; there is no case 4
86+
dec a
87+
jreq 050$
88+
dec a ; there is no case 6
89+
dec a
90+
jreq 070$
91+
92+
; fallthrough into OUTPUT as the default case
93+
94+
;
95+
; case OUTPUT // 1: output, push-pull, slow
96+
; gpio->CR1 |= bit;
97+
; gpio->CR2 &= ~bit;
98+
; gpio->DDR |= bit;
99+
;
100+
010$:
101+
sim
102+
// BIT_SET(CR1)
103+
ld a,yl
104+
or a,(CR1,x)
105+
jra 031$
106+
107+
;
108+
; case OUTPUT_OD // 3: output open drain, slow
109+
; gpio->CR1 &= ~bit;
110+
; gpio->CR2 &= ~bit;
111+
; gpio->DDR |= bit;
112+
;
113+
030$:
114+
sim
115+
// BIT_CLEAR(CR1)
116+
ld a,yh
117+
and a,(CR1,x)
118+
031$: ld (CR1,x),a
119+
BIT_CLEAR(CR2)
120+
BIT_SET(DDR)
121+
rim
122+
ret
75123

76124
;
77-
; case INPUT
125+
; case INPUT // 0: input, floating
78126
; gpio->CR2 &= ~bit; // first: deactivate interrupt
79127
; gpio->CR1 &= ~bit; // release top side
80128
; gpio->DDR &= ~bit; // now set direction
81129
;
82-
ld a, (4, sp)
83-
jrne 00116$
84-
130+
000$:
85131
sim
86-
BIT_CLEAR(CR2)
87-
BIT_CLEAR(CR1)
88-
BIT_CLEAR(DDR)
132+
BIT_CLEAR(CR2) ; first: deactivate interrupt
133+
BIT_CLEAR(CR1) ; release top side
134+
BIT_CLEAR(DDR) ; now set direction
89135
rim
90-
002$: ret
136+
001$: ret
91137

92138
;
93-
; case INPUT_PULLUP
139+
; case INPUT_PULLUP // 2: input, internal pull up active
94140
; gpio->CR2 &= ~bit; // first: deactivate interrupt
95141
; gpio->DDR &= ~bit; // set direction before
96142
; gpio->CR1 |= bit; // activating the pull up
97143
;
98-
00116$:
99-
cp a, #0x02
100-
jrne 00113$
101-
144+
020$:
102145
sim
103-
BIT_CLEAR(CR2)
104-
BIT_CLEAR(DDR)
105-
BIT_SET(CR1)
146+
BIT_CLEAR(CR2) ; first: deactivate interrupt
147+
BIT_CLEAR(DDR) ; set direction before
148+
BIT_SET(CR1) ; activating the pull up
106149
rim
107150
ret
108151

109152
;
110-
; case OUTPUT_FAST // output push-pull, fast
153+
; case OUTPUT_FAST // 5: output push-pull, fast
111154
; gpio->CR1 |= bit;
112155
; gpio->DDR |= bit; // direction before setting CR2 to
113156
; gpio->CR2 |= bit; // avoid accidental interrupt
114157
;
115-
00113$:
116-
cp a, #0x05
117-
jrne 00110$
118-
158+
050$:
119159
sim
120-
BIT_SET(CR1)
121-
jra 010$
160+
// BIT_SET(CR1)
161+
ld a,yl
162+
or a,(CR1,x)
163+
jra 071$
122164

123165
;
124-
; case OUTPUT_OD_FAST // output open drain, fast
166+
; case OUTPUT_OD_FAST // 7: output open drain, fast
125167
; gpio->CR1 &= ~bit;
126168
; gpio->DDR |= bit; // direction before setting CR2 to
127169
; gpio->CR2 |= bit; // avoid accidental interrupt
128170
;
129-
00110$:
130-
cp a, #0x07
131-
jrne 00107$
132-
133-
sim
134-
BIT_CLEAR(CR1)
135-
010$: BIT_SET(DDR)
136-
BIT_SET(CR2)
137-
rim
138-
ret
139-
140-
;
141-
; case OUTPUT_OD // output open drain, slow
142-
; gpio->CR1 &= ~bit;
143-
; gpio->CR2 &= ~bit;
144-
; gpio->DDR |= bit;
145-
;
146-
00107$:
147-
cp a, #0x03
148-
jrne 00104$
149-
150-
sim
151-
BIT_CLEAR(CR1)
152-
jra 004$
153-
154-
;
155-
; case default //
156-
; gpio->CR1 |= bit;
157-
; gpio->CR2 &= ~bit;
158-
; gpio->DDR |= bit;
159-
;
160-
00104$:
171+
070$:
161172
sim
162-
BIT_SET(CR1)
163-
004$: BIT_CLEAR(CR2)
173+
// BIT_CLEAR(CR1)
174+
ld a,yh\
175+
and a,(CR1,x)\
176+
071$: ld (CR1,x),a
164177
BIT_SET(DDR)
178+
BIT_SET(CR2)
165179
rim
166180

167181
__endasm;
168182
}
169-
170-
/*
171-
void pinMode_asm(uint8_t pin, uint8_t mode)
172-
{
173-
(void) pin; // empty code to avoid warning
174-
(void) mode;
175-
__asm
176-
sub sp, #16
177-
#if 1
178-
; pinmode.c: 10: uint8_t bit = digitalPinToBitMask(pin);
179-
clrw x
180-
181-
ld a,(0x03, sp)
182-
ld xl,a
183-
addw x, #_digital_pin_to_bit_mask_PGM+0
184-
ld a, (x) ; bit
185-
ld yl,a ; yl = bit
186-
cpl a
187-
ld yh,a ; yh = ~bit
188-
189-
; pinmode.c: 11: uint8_t port = digitalPinToPort(pin);
190-
;;hier addw x, #_digital_pin_to_bit_mask_PGM - _digital_pin_to_bit_mask_PGM
191-
ld a, (x) ; port
192-
jreq 00018$
193-
194-
sll a
195-
clrw x
196-
ld xl,a
197-
addw x, #_port_to_output_PGM+0 ; x = gpio
198-
199-
ld a,(0x04,sp) ; a = mode, flags are set
200-
#else
201-
; pinmode.c: 10: uint8_t bit = digitalPinToBitMask(pin);
202-
ldw x, #_digital_pin_to_bit_mask_PGM+0
203-
ld a, xl
204-
add a, (0x13, sp)
205-
rlwa x
206-
adc a, #0x00
207-
ld xh, a
208-
ld a, (x)
209-
ld (0x04, sp), a ; bit := 4
210-
; pinmode.c: 11: uint8_t port = digitalPinToPort(pin);
211-
ldw x, #_digital_pin_to_port_PGM+0
212-
ld a, xl
213-
add a, (0x13, sp)
214-
rlwa x
215-
adc a, #0x00
216-
ld xh, a
217-
ld a, (x)
218-
ld (0x03, sp), a
219-
ld a, (0x03, sp)
220-
ld (0x07, sp), a ; port := 7
221-
; pinmode.c: 14: if (port == NOT_A_PIN) return;
222-
tnz (0x03, sp)
223-
jrne 00002$
224-
jp 00018$
225-
00002$:
226-
; pinmode.c: 16: gpio = (GPIO_TypeDef *) portOutputRegister(port);
227-
ldw x, #_port_to_output_PGM+0
228-
ldw (0x0e, sp), x
229-
ld a, (0x07, sp)
230-
ld xl, a
231-
ld a, #0x02
232-
mul x, a
233-
addw x, (0x0e, sp)
234-
ldw x, (x) ; jetzt ist gpio in x
235-
236-
ld a, (0x04, sp) ; bit
237-
ld yl,a ; yl = bit
238-
cpl a
239-
ld yh,a ; yh = ~bit
240-
ld a, (0x14, sp) ; a=mode, flags are set
241-
#endif
242-
243-
; gpio->DDR: (2,x) (war an c,SP)
244-
; gpio->CR1: (3,x) (war an 8,SP)
245-
; gpio->CR2: (4,x) (war an 5,SP)
246-
247-
sim
248-
; pinmode.c: 18: if (mode == INPUT) {
249-
jrne 00016$
250-
; pinmode.c: 20: gpio->CR2 &= ~bit; // first: deactivate interrupt
251-
ld a,yh
252-
and a,(4,x)
253-
ld (4,x),a
254-
; pinmode.c: 21: gpio->CR1 &= ~bit; // release top side
255-
ld a,yh
256-
and a,(3,x)
257-
ld (3,x),a
258-
; pinmode.c: 22: gpio->DDR &= ~bit; // now set direction
259-
ld a,yh
260-
and a,(2,x)
261-
jp 00022$
262-
263-
00016$:
264-
; pinmode.c: 24: } else if (mode == INPUT_PULLUP) {
265-
cp a, #0x02
266-
jrne 00013$
267-
; pinmode.c: 26: gpio->CR2 &= ~bit; // first: deactivate interrupt
268-
ld a,yh
269-
and a,(4,x)
270-
ld (4,x),a
271-
; pinmode.c: 27: gpio->DDR &= ~bit; // set direction before
272-
ld a,yh
273-
and a,(2,x)
274-
ld (2,x),a
275-
; pinmode.c: 28: gpio->CR1 |= bit; // activating the pull up
276-
ld a,yl
277-
or a,(3,x)
278-
ld (3,x),a
279-
jp 00018$
280-
281-
00013$:
282-
; pinmode.c: 30: } else if (mode == OUTPUT_FAST) {// output push-pull, fast
283-
cp a, #0x05
284-
jrne 00010$
285-
; pinmode.c: 32: gpio->CR1 |= bit;
286-
ld a,yl
287-
or a,(3,x)
288-
jra 00020$
289-
; pinmode.c: 39: gpio->DDR |= bit; // direction before setting CR2 to
290-
; pinmode.c: 40: gpio->CR2 |= bit; // avoid accidental interrupt
291-
00010$:
292-
; pinmode.c: 36: } else if (mode == OUTPUT_OD_FAST) { // output open drain, fast
293-
cp a, #0x07
294-
jrne 00007$
295-
; pinmode.c: 38: gpio->CR1 &= ~bit;
296-
ld a,yh
297-
and a,(3,x)
298-
00020$: ld (3,x),a
299-
; pinmode.c: 39: gpio->DDR |= bit; // direction before setting CR2 to
300-
ld a,yl
301-
or a,(2,x)
302-
ld (2,x),a
303-
; pinmode.c: 40: gpio->CR2 |= bit; // avoid accidental interrupt
304-
ld a,yl
305-
or a,(4,x)
306-
ld (4,x),a
307-
jra 00018$
308-
309-
00007$:
310-
; pinmode.c: 42: } else if (mode == OUTPUT_OD) { // output open drain, slow
311-
cp a, #0x03
312-
jrne 00004$
313-
; pinmode.c: 44: gpio->CR1 &= ~bit;
314-
ld a,yh
315-
and a,(3,x)
316-
jra 00021$
317-
; pinmode.c: 45: gpio->CR2 &= ~bit;
318-
; pinmode.c: 46: gpio->DDR |= bit;
319-
00004$:
320-
; pinmode.c: 50: gpio->CR1 |= bit;
321-
ld a,yl
322-
or a,(3,x)
323-
00021$: ld (3,x),a
324-
; pinmode.c: 51: gpio->CR2 &= ~bit;
325-
ld a,yh
326-
and a,(4,x)
327-
ld (4,x),a
328-
; pinmode.c: 52: gpio->DDR |= bit;
329-
ld a,yl
330-
or a,(2,x)
331-
00022$: ld (2,x),a
332-
00018$:
333-
rim
334-
addw sp, #16
335-
__endasm;
336-
}
337-
*/

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