don't compile all the SDuino files

tenbaht · tenbaht · commit 85e9b6081dcc · 2019-01-09T13:42:22.000+01:00
diff --git a/test/pinmode/Makefile b/test/pinmode/Makefile
@@ -7,14 +7,17 @@ BINDIR=$(SDCCBASE)/bin
 CC=$(BINDIR)/sdcc
 LD=$(BINDIR)/sdld
 
-LIBBASE=../../STM8S_StdPeriph_Driver
-SDUINO=../../sduino
+SDBASE=../../sduino/hardware/sduino/stm8
+LIBBASE=$(SDBASE)/STM8S_StdPeriph_Driver
+SDUINO=$(SDBASE)/cores/sduino
 
 CFLAGS= --debug -mstm8 -DF_CPU=16000000L -DSTM8S103 \
-	-I. -I$(SDUINO) -I$(LIBBASE)/inc -I/usr/share/sdcc/include/
+	-I. -I$(SDUINO) -I$(SDBASE)/variants/standard \
+	-I$(LIBBASE)/inc -I$(LIBBASE)/src \
+	-I$(SDCCBASE)/share/sdcc/include/
 # -DSUPPORT_ALTERNATE_MAPPINGS 
 
-LDFLAGS=-L$(LIBBASE)/src -L/opt/sdcc/share/sdcc/lib/stm8 -lstm8s103
+LDFLAGS=-L$(LIBBASE)/lib  -L$(SDCCBASE)/share/sdcc/lib/stm8 -lSTM8S103
 
 OBJECTS=$(BASENAME).rel
 SDOBJECTS=main.rel wiring.rel wiring_digital.rel SPI.rel \
@@ -24,8 +27,7 @@ SDOBJECTS=main.rel wiring.rel wiring_digital.rel SPI.rel \
 
 #all: $(OBJECTS)
 
-$(EXECUTABLE): $(OBJECTS) $(SDOBJECTS)
-#test.rel wiring_digital.rel
+$(EXECUTABLE): $(OBJECTS) #$(SDOBJECTS)
 	$(CC) $(CFLAGS) $(LDFLAGS) $^ -o $@
 
 $(OBJECTS) : %.rel : %.c
diff --git a/test/pinmode/pinmode.c b/test/pinmode/pinmode.c
@@ -2,10 +2,12 @@
  * test spi functions
  */
 
+#define ARDUINO_MAIN
 #include "Arduino.h"
 #include "wiring_private.h"
+#include "stm8s_it.h"
 
-void pinMode1(uint8_t pin, uint8_t mode)
+void pinMode_c(uint8_t pin, uint8_t mode)
 {
 	uint8_t bit = digitalPinToBitMask(pin);
 	uint8_t port = digitalPinToPort(pin);
@@ -266,7 +268,7 @@ uint8_t checkresult(uint8_t *adr, uint8_t *data)
 }
 
 
-void setup(void)
+void main(void)
 {
 	// expected result: xx xx 00 00 00
 	pinMode_asm(PA1,INPUT);
@@ -293,7 +295,30 @@ void setup(void)
 	checkresult(GPIOD_BaseAddress, "\x42\x02\x42");
 }
 
+#include "stm8s_it.h"
 
-void loop (void)
-{
-}
+/*
+ * empty default IRQ functions to make the linker happy if the
+ * respective module is not to linked.
+ */
+
+void UART1_TX_IRQHandler(void) __interrupt(ITC_IRQ_UART1_TX){}
+void UART1_RX_IRQHandler(void) __interrupt(ITC_IRQ_UART1_RX){}
+
+// define as __naked to avoid the "clr a/dix x,a" prolog
+#define IMPLEMENT_ISR(vect, interrupt) \
+ void vect(void) __interrupt((interrupt)>>8) __naked { \
+    __asm__("iret"); \
+  }
+
+IMPLEMENT_ISR(EXTI_PORTA_IRQHandler,		INT_PORTA) /* EXTI PORTA */
+IMPLEMENT_ISR(EXTI_PORTB_IRQHandler,		INT_PORTB) /* EXTI PORTB */
+IMPLEMENT_ISR(EXTI_PORTC_IRQHandler,		INT_PORTC) /* EXTI PORTC */
+IMPLEMENT_ISR(EXTI_PORTD_IRQHandler,		INT_PORTD) /* EXTI PORTD */
+IMPLEMENT_ISR(EXTI_PORTE_IRQHandler,		INT_PORTE) /* EXTI PORTE */
+IMPLEMENT_ISR(TIM1_CAP_COM_IRQHandler,		INT_TIM1_CAPCOM)
+//IMPLEMENT_ISR(TIM1_UPD_OVF_TRG_BRK_IRQHandler,	INT_TIM1_OVF)
+//IMPLEMENT_ISR(TIM2_CAP_COM_IRQHandler,		INT_TIM2_CAPCOM)
+//IMPLEMENT_ISR(TIM2_UPD_OVF_TRG_BRK_IRQHandler,	INT_TIM2_OVF)
+
+void TIM4_UPD_OVF_IRQHandler(void) __interrupt(ITC_IRQ_TIM4_OVF){}
