@@ -54,6 +54,60 @@ const uc_p ccmrx[NUM_TIMERS]={
5454#endif
5555};
5656
57+ /**
58+ * CCER register for each timer channel.
59+ *
60+ * Each 8-bit-register can contain the bits for two channels, so in addition to
61+ * the register address itself you also need the individual offset(s) of the
62+ * bit(s) you want to access.
63+ */
64+ const uc_p ccerx [NUM_TIMERS ]= {
65+ #ifdef NEED_TIMER_11_12
66+ TIM1 -> CCER1 , /* for TIMER11 */
67+ TIM1 -> CCER1 , /* for TIMER12 */
68+ #endif
69+ TIM1 -> CCER2 , /* for TIMER13 */
70+ TIM1 -> CCER2 , /* for TIMER14 */
71+ TIM2 -> CCER1 , /* for TIMER21 */
72+ TIM2 -> CCER1 , /* for TIMER22 */
73+ #ifdef NEED_TIMER_23
74+ TIM2 -> CCER2 , /* for TIMER23 */
75+ #endif
76+ #ifdef NEED_TIMER_31_32
77+ TIM3 -> CCER1 , /* for TIMER31 */
78+ TIM3 -> CCER1 /* for TIMER32 */
79+ #endif
80+ };
81+
82+ /**
83+ * These Bits have to be set to 0 in the timer channel's CCER
84+ * (Capture/compare enable register) to disable the output, so that the
85+ * physical pin is not driven by the timer.
86+ *
87+ * @see
88+ * RM0016 Reference Manual
89+ * STM8S Series and STM8AF Series 8-bit microcontrollers
90+ * DocID14587 Rev 14 (Oct 2017)
91+ * Table 38. Output control for complementary OCi and OCiN channels with break
92+ * feature
93+ */
94+ const unsigned char DISABLE_TIMER_OUTP_MASK [NUM_TIMERS ]= {
95+ #ifdef NEED_TIMER_11_12
96+ (1 << 0 ) | (1 << 2 ), /* for TIMER11 */
97+ (1 << 4 ) | (1 << 6 ), /* for TIMER12 */
98+ #endif
99+ (1 << 0 ) | (1 << 2 ), /* for TIMER13 */
100+ (1 << 4 ), /* for TIMER14 */
101+ (1 << 0 ), /* for TIMER21 */
102+ (1 << 4 ), /* for TIMER22 */
103+ #ifdef NEED_TIMER_23
104+ (1 << 0 ), /* for TIMER23 */
105+ #endif
106+ #ifdef NEED_TIMER_31_32
107+ (1 << 0 ), /* for TIMER31 */
108+ (1 << 4 ) /* for TIMER32 */
109+ #endif
110+ };
57111
58112
59113/* arduino-style pinMode
@@ -173,7 +227,13 @@ void pinMode(uint8_t pin, uint8_t mode)
173227 */
174228static void turnOffPWM (uint8_t timer )
175229{
176- * ((unsigned char * ) ccmrx [timer - 1 ]) &= ~TIM1_CCMR_OCM ;
230+ // Output compare mode = 000: Frozen - The comparison between the output
231+ // compare register TIM1_CCR1 and the counter register TIM1_CNT has no
232+ // effect on the outputs.
233+ * ((unsigned char * ) ccmrx [timer - 1 ]) &= ~TIM1_CCMR_OCM ;
234+
235+ // CCiE = CCiNE = 0: Output disabled (not driven by the timer)
236+ * ((unsigned char * ) ccerx [timer - 1 ]) &=~ (DISABLE_TIMER_OUTP_MASK [timer - 1 ]);
177237}
178238
179239
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