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tenbahttenbaht
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split wiring_digital.c
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‎sduino/hardware/sduino/stm8/cores/sduino/wiring_digital.c‎

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This file was deleted.

‎sduino/hardware/sduino/stm8/cores/sduino/wiring_digital.c-1.c‎

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#include "wiring_digital.c.h"
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/**
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* timer capture/compare mode register to control PWM mode
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*/
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const uc_p ccmrx[NUM_TIMERS]={
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#ifdef NEED_TIMER_11_12
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TIM1->CCMR1, /* for TIMER11 */
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TIM1->CCMR2, /* for TIMER12 */
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#endif
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TIM1->CCMR3, /* for TIMER13 */
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TIM1->CCMR4, /* for TIMER14 */
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TIM2->CCMR1, /* for TIMER21 */
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TIM2->CCMR2, /* for TIMER22 */
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#ifdef NEED_TIMER_23
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TIM2->CCMR3, /* for TIMER23 */
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#endif
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#ifdef NEED_TIMER_31_32
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TIM3->CCMR1, /* for TIMER31 */
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TIM3->CCMR2 /* for TIMER32 */
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#endif
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};
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‎sduino/hardware/sduino/stm8/cores/sduino/wiring_digital.c-2.c‎

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#include "wiring_digital.c.h"
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/**
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* CCER register for each timer channel.
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*
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* Each 8-bit-register can contain the bits for two channels, so in addition to
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* the register address itself you also need the individual offset(s) of the
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* bit(s) you want to access.
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*/
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const uc_p ccerx[NUM_TIMERS]={
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#ifdef NEED_TIMER_11_12
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TIM1->CCER1, /* for TIMER11 */
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TIM1->CCER1, /* for TIMER12 */
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#endif
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TIM1->CCER2, /* for TIMER13 */
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TIM1->CCER2, /* for TIMER14 */
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TIM2->CCER1, /* for TIMER21 */
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TIM2->CCER1, /* for TIMER22 */
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#ifdef NEED_TIMER_23
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TIM2->CCER2, /* for TIMER23 */
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#endif
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#ifdef NEED_TIMER_31_32
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TIM3->CCER1, /* for TIMER31 */
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TIM3->CCER1 /* for TIMER32 */
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#endif
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};
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‎sduino/hardware/sduino/stm8/cores/sduino/wiring_digital.c-3.c‎

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#include "wiring_digital.c.h"
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/**
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* These Bits have to be set to 0 in the timer channel's CCER
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* (Capture/compare enable register) to disable the output, so that the
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* physical pin is not driven by the timer.
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*
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* @see
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* RM0016 Reference Manual
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* STM8S Series and STM8AF Series 8-bit microcontrollers
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* DocID14587 Rev 14 (Oct 2017)
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* Table 38. Output control for complementary OCi and OCiN channels with break
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* feature
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*/
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const unsigned char DISABLE_TIMER_OUTP_MASK[NUM_TIMERS]={
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#ifdef NEED_TIMER_11_12
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(1 << 0) | (1 << 2), /* for TIMER11 */
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(1 << 4) | (1 << 6), /* for TIMER12 */
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#endif
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(1 << 0) | (1 << 2), /* for TIMER13 */
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(1 << 4), /* for TIMER14 */
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(1 << 0), /* for TIMER21 */
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(1 << 4), /* for TIMER22 */
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#ifdef NEED_TIMER_23
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(1 << 0), /* for TIMER23 */
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#endif
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#ifdef NEED_TIMER_31_32
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(1 << 0), /* for TIMER31 */
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(1 << 4) /* for TIMER32 */
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#endif
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};
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