feat: add nxp mcx port (ZigEmbeddedGroup#649)

rmrt1n · web-flow · commit 204d2a6af764 · 2025-08-25T21:22:11.000-07:00
* feat: add nxp mcx port

* refactor: fetch svd from github and rename init -&gt; num

* chore: code style + add mcx example to ci
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
@@ -173,6 +173,7 @@ jobs:
             microchip/atsam,
             nordic/nrf5x,
             nxp/lpc,
+            nxp/mcx,
             stmicro/stm32,
             raspberrypi/rp2xxx,
             wch/ch32v,
diff --git a/build.zig b/build.zig
@@ -27,6 +27,7 @@ const port_list: []const struct {
     .{ .name = "avr", .dep_name = "port/microchip/avr" },
     .{ .name = "nrf5x", .dep_name = "port/nordic/nrf5x" },
     .{ .name = "lpc", .dep_name = "port/nxp/lpc" },
+    .{ .name = "mcx", .dep_name = "port/nxp/mcx" },
     .{ .name = "rp2xxx", .dep_name = "port/raspberrypi/rp2xxx" },
     .{ .name = "stm32", .dep_name = "port/stmicro/stm32" },
     .{ .name = "ch32v", .dep_name = "port/wch/ch32v" },
diff --git a/build.zig.zon b/build.zig.zon
@@ -29,6 +29,7 @@
         .@"port/microchip/avr" = .{ .path = "port/microchip/avr", .lazy = true },
         .@"port/nordic/nrf5x" = .{ .path = "port/nordic/nrf5x", .lazy = true },
         .@"port/nxp/lpc" = .{ .path = "port/nxp/lpc", .lazy = true },
+        .@"port/nxp/mcx" = .{ .path = "port/nxp/mcx", .lazy = true },
         .@"port/raspberrypi/rp2xxx" = .{ .path = "port/raspberrypi/rp2xxx", .lazy = true },
         .@"port/stmicro/stm32" = .{ .path = "port/stmicro/stm32", .lazy = true },
         .@"port/wch/ch32v" = .{ .path = "port/wch/ch32v", .lazy = true },
diff --git a/examples/nxp/mcx/README.md b/examples/nxp/mcx/README.md
@@ -0,0 +1,18 @@
+# Examples for NXP MCX port
+
+All examples:
+
+| Example                          | Description                |
+| -------------------------------- |--------------------------- |
+| [Blinky](src/blinky.zig)         | A basic LED blink example  |
+| [GPIO input](src/gpio_input.zig) | Toggle LED on button press |
+
+## Flashing
+
+You can flash using [NXP's LinkServer](https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER) or [pyOCD](https://pyocd.io/) with a [MCXA CMSIS pack](https://www.keil.arm.com/packs/mcxa153_dfp-nxp/devices/), e.g.:
+
+```sh
+zig build -Dexample=blinky -Doptimize=ReleaseSmall
+
+pyocd flash ./zig-out/firmware/blinky.elf --target mcxa153 --quiet
+```
diff --git a/examples/nxp/mcx/build.zig b/examples/nxp/mcx/build.zig
@@ -0,0 +1,55 @@
+const std = @import("std");
+const microzig = @import("microzig");
+
+const MicroBuild = microzig.MicroBuild(.{
+    .mcx = true,
+});
+
+pub fn build(b: *std.Build) void {
+    const optimize = b.standardOptimizeOption(.{});
+    const maybe_example = b.option([]const u8, "example", "only build matching examples");
+
+    const mz_dep = b.dependency("microzig", .{});
+    const mb = MicroBuild.init(b, mz_dep) orelse return;
+
+    const frdm_mcxa153 = mb.ports.mcx.chips.mcxa153;
+
+    const available_examples = [_]Example{
+        .{ .name = "blinky", .target = frdm_mcxa153, .file = "src/blinky.zig" },
+        .{ .name = "gpio_input", .target = frdm_mcxa153, .file = "src/gpio_input.zig" },
+    };
+
+    for (available_examples) |example| {
+        // If we specify example, only select the ones that match
+        if (maybe_example) |selected_example|
+            if (!std.mem.containsAtLeast(u8, example.name, 1, selected_example))
+                continue;
+
+        // `add_firmware` basically works like addExecutable, but takes a
+        // `microzig.Target` for target instead of a `std.zig.CrossTarget`.
+        //
+        // The target will convey all necessary information on the chip,
+        // cpu and potentially the board as well.
+        const firmware = mb.add_firmware(.{
+            .name = example.name,
+            .target = example.target,
+            .optimize = optimize,
+            .root_source_file = b.path(example.file),
+        });
+
+        // `install_firmware()` is the MicroZig pendant to `Build.installArtifact()`
+        // and allows installing the firmware as a typical firmware file.
+        //
+        // This will also install into `$prefix/firmware` instead of `$prefix/bin`.
+        mb.install_firmware(firmware, .{});
+
+        // For debugging, we also always install the firmware as an ELF file
+        mb.install_firmware(firmware, .{ .format = .elf });
+    }
+}
+
+const Example = struct {
+    target: *const microzig.Target,
+    name: []const u8,
+    file: []const u8,
+};
diff --git a/examples/nxp/mcx/build.zig.zon b/examples/nxp/mcx/build.zig.zon
@@ -0,0 +1,15 @@
+.{
+    .name = .examples_nxp_mcx,
+    .version = "0.0.0",
+    .fingerprint = 0x345c53e39b0295f5,
+    .minimum_zig_version = "0.14.1",
+    .dependencies = .{
+        .microzig = .{ .path = "../../.." },
+    },
+    .paths = .{
+        "build.zig",
+        "build.zig.zon",
+        "src",
+        "README.md",
+    },
+}
diff --git a/examples/nxp/mcx/src/blinky.zig b/examples/nxp/mcx/src/blinky.zig
@@ -0,0 +1,24 @@
+const microzig = @import("microzig");
+const hal = microzig.hal;
+
+const port3 = hal.port.num(3);
+const pin_led_red = port3.get_gpio(12);
+
+pub fn main() void {
+    port3.init();
+
+    pin_led_red.init();
+    pin_led_red.set_direction(.out);
+    pin_led_red.put(1); // Turn off
+
+    while (true) {
+        pin_led_red.toggle();
+        delay_cycles(96_000_000 / 80);
+    }
+}
+
+fn delay_cycles(cycles: u32) void {
+    for (0..cycles) |_| {
+        asm volatile ("nop");
+    }
+}
diff --git a/examples/nxp/mcx/src/gpio_input.zig b/examples/nxp/mcx/src/gpio_input.zig
@@ -0,0 +1,41 @@
+const microzig = @import("microzig");
+const hal = microzig.hal;
+
+pub const microzig_options = microzig.Options{
+    .interrupts = .{ .GPIO3 = .{ .c = gpio3_irq_handler } },
+};
+
+const port3 = hal.port.num(3);
+const pin_led_red = port3.get_gpio(12);
+const pin_button = port3.get_gpio(29);
+
+pub fn main() void {
+    microzig.interrupt.enable_interrupts();
+    microzig.interrupt.enable(.GPIO3);
+
+    port3.init();
+
+    pin_led_red.init();
+    pin_led_red.set_direction(.out);
+    pin_led_red.put(1);
+
+    pin_button.init();
+    pin_button.set_direction(.in);
+    pin_button.set_interrupt_config(.interrupt_rising_edge);
+
+    while (true) {
+        const is_pressed: *volatile bool = &button_pressed;
+        if (is_pressed.*) {
+            pin_led_red.toggle();
+            is_pressed.* = false;
+        }
+    }
+}
+
+var button_pressed: bool = false;
+fn gpio3_irq_handler() callconv(.c) void {
+    pin_button.clear_interrupt_flag();
+
+    const is_pressed: *volatile bool = &button_pressed;
+    is_pressed.* = true;
+}
diff --git a/port/nxp/mcx/README.md b/port/nxp/mcx/README.md
@@ -0,0 +1,5 @@
+# NXP MCX Series
+
+HAL and register definitions for NXP MCX series MCUs. Currently only supports MCXA153.
+
+Register defintions are taken from: https://github.com/nxp-mcuxpresso/mcux-soc-svd/
diff --git a/port/nxp/mcx/build.zig b/port/nxp/mcx/build.zig
@@ -0,0 +1,57 @@
+const std = @import("std");
+const microzig = @import("microzig/build-internals");
+
+const Self = @This();
+
+chips: struct {
+    mcxa153: *const microzig.Target,
+},
+
+boards: struct {
+    frdm_mcxa153: *const microzig.Target,
+},
+
+pub fn init(dep: *std.Build.Dependency) Self {
+    const b = dep.builder;
+
+    const mcux_soc_svd = b.dependency("mcux-soc-svd", .{});
+
+    const chip_mcxa153: microzig.Target = .{
+        .dep = dep,
+        .preferred_binary_format = .elf,
+        .zig_target = .{
+            .cpu_arch = .thumb,
+            .cpu_model = .{ .explicit = &std.Target.arm.cpu.cortex_m33 },
+            .os_tag = .freestanding,
+            .abi = .eabi,
+        },
+        .chip = .{
+            .name = "MCXA153",
+            .register_definition = .{ .svd = mcux_soc_svd.path("MCXA153/MCXA153.xml") },
+            .memory_regions = &.{
+                .{ .tag = .flash, .offset = 0x00000000, .length = 128 * 1024, .access = .rx },
+                .{ .tag = .ram, .offset = 0x20000000, .length = 24 * 1024, .access = .rw },
+            },
+        },
+        .hal = .{ .root_source_file = b.path("src/hal.zig") },
+    };
+
+    return .{
+        .chips = .{
+            .mcxa153 = chip_mcxa153.derive(.{}),
+        },
+        .boards = .{
+            .frdm_mcxa153 = chip_mcxa153.derive(.{
+                .board = .{
+                    .name = "FRDM Development Board for MCX A153",
+                    .url = "https://www.nxp.com/part/FRDM-MCXA153",
+                    .root_source_file = b.path("src/boards/frdm_mcxa153.zig"),
+                },
+            }),
+        },
+    };
+}
+
+pub fn build(b: *std.Build) void {
+    _ = b;
+}
diff --git a/port/nxp/mcx/build.zig.zon b/port/nxp/mcx/build.zig.zon
@@ -0,0 +1,19 @@
+.{
+    .name = .mz_port_mcx,
+    .version = "0.0.0",
+    .fingerprint = 0xe43e30911cb3fe37,
+    .minimum_zig_version = "0.14.1",
+    .dependencies = .{
+        .@"microzig/build-internals" = .{ .path = "../../../build-internals" },
+        .@"mcux-soc-svd" = .{
+            .url = "https://github.com/nxp-mcuxpresso/mcux-soc-svd/archive/refs/tags/MCUX_2.16.100.tar.gz",
+            .hash = "N-V-__8AADdFeofKFhsuzMbDdzLAKB4-syMJsHSEOTYGFrlH",
+        },
+    },
+    .paths = .{
+        "build.zig",
+        "build.zig.zon",
+        "src",
+        "README.md",
+    },
+}
diff --git a/port/nxp/mcx/src/boards/frdm_mcxa153.zig b/port/nxp/mcx/src/boards/frdm_mcxa153.zig
diff --git a/port/nxp/mcx/src/hal.zig b/port/nxp/mcx/src/hal.zig
@@ -0,0 +1,5 @@
+const microzig = @import("microzig");
+
+pub const syscon = @import("./hal/syscon.zig");
+pub const port = @import("./hal/port.zig");
+pub const gpio = @import("./hal/gpio.zig");
diff --git a/port/nxp/mcx/src/hal/gpio.zig b/port/nxp/mcx/src/hal/gpio.zig
@@ -0,0 +1,114 @@
+const microzig = @import("microzig");
+const syscon = @import("./syscon.zig");
+
+const chip = microzig.chip;
+
+pub fn num(comptime n: u2, comptime pin: u5) GPIO {
+    return @enumFromInt(@as(u7, n) << 5 | pin);
+}
+
+pub const GPIO = enum(u7) {
+    _,
+
+    pub fn init(comptime gpio: GPIO) void {
+        const tag = switch (gpio.get_n()) {
+            0 => .GPIO0,
+            1 => .GPIO1,
+            2 => .GPIO2,
+            3 => .GPIO3,
+        };
+
+        syscon.reset_release(tag);
+        syscon.enable_clock(tag);
+    }
+
+    pub fn put(gpio: GPIO, output: u1) void {
+        const regs = gpio.get_regs();
+        const old: u32 = regs.PDOR.raw;
+        const new = @as(u32, output) << gpio.get_pin();
+
+        regs.PDOR.write_raw(old & ~gpio.get_mask() | new);
+    }
+
+    pub fn get(gpio: GPIO) bool {
+        const regs = gpio.get_regs();
+
+        return regs.PDIR.raw >> gpio.get_pin() & 1 != 0;
+    }
+
+    pub fn toggle(gpio: GPIO) void {
+        const regs = gpio.get_regs();
+        const old: u32 = regs.PTOR.raw;
+
+        regs.PTOR.write_raw(old | gpio.get_mask());
+    }
+
+    pub fn set_direction(gpio: GPIO, direction: Direction) void {
+        const regs = gpio.get_regs();
+        const old: u32 = regs.PDDR.raw;
+        const new = @as(u32, @intFromEnum(direction)) << gpio.get_pin();
+
+        regs.PDDR.write_raw(old & ~gpio.get_mask() | new);
+    }
+
+    pub fn set_interrupt_config(gpio: GPIO, trigger: InterruptConfig) void {
+        const regs = gpio.get_regs();
+        const irqc = @as(u32, @intFromEnum(trigger)) << 16;
+        const isf = @as(u32, 1) << 24;
+
+        regs.ICR[gpio.get_pin()].write_raw(irqc | isf);
+    }
+
+    pub fn get_interrupt_flag(gpio: GPIO) bool {
+        const regs = gpio.get_regs();
+
+        return regs.ISFR0.raw >> gpio.get_pin() & 1 != 0;
+    }
+
+    pub fn clear_interrupt_flag(gpio: GPIO) void {
+        const regs = gpio.get_regs();
+        const old: u32 = regs.ISFR0.raw;
+
+        regs.ISFR0.write_raw(old | gpio.get_mask());
+    }
+
+    fn get_regs(gpio: GPIO) *volatile chip.types.peripherals.GPIO0 {
+        return switch (gpio.get_n()) {
+            0 => chip.peripherals.GPIO0,
+            1 => chip.peripherals.GPIO1,
+            2 => chip.peripherals.GPIO2,
+            3 => chip.peripherals.GPIO3,
+        };
+    }
+
+    inline fn get_n(gpio: GPIO) u2 {
+        return @intCast(@intFromEnum(gpio) >> 5);
+    }
+
+    inline fn get_pin(gpio: GPIO) u5 {
+        return @intCast(@intFromEnum(gpio) & 0x1f);
+    }
+
+    inline fn get_mask(gpio: GPIO) u32 {
+        return @as(u32, 1) << gpio.get_pin();
+    }
+};
+
+const Direction = enum(u1) { in, out };
+
+const InterruptConfig = enum(u4) {
+    disabled = 0,
+    dma_rising_edge = 1,
+    dma_falling_edge = 2,
+    dma_either_edge = 3,
+    flag_rising_edge = 5,
+    flag_falling_edge = 6,
+    flag_either_edge = 7,
+    interrupt_logic_zero = 8,
+    interrupt_rising_edge = 9,
+    interrupt_falling_edge = 10,
+    interrupt_either_edge = 11,
+    interrupt_logic_one = 12,
+    active_high_trigger_output_enable = 13,
+    active_low_trigger_output_enable = 14,
+};
diff --git a/port/nxp/mcx/src/hal/port.zig b/port/nxp/mcx/src/hal/port.zig
diff --git a/port/nxp/mcx/src/hal/syscon.zig b/port/nxp/mcx/src/hal/syscon.zig
