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ram.sv
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33 lines (28 loc) · 1.03 KB
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/****************************************************************************************
* *
* https://www.bigmessowires.com/nibbler/ *
* Implementation by: Bryan Chan and Diego Regalado *
* *
*****************************************************************************************/
module Ram(
input [11:0] address,
input notChipEnable,
input notWriteEnable,
inout [3:0] io
);
// Data storage
reg [3:0] data [0:4095];
reg [3:0] outputData;
// Tristate buffer (Inout switching)
assign io = (~notChipEnable&¬WriteEnable) ? outputData : 4'bzzzz;
always @ (address or notChipEnable or notWriteEnable) begin
if(~notChipEnable&&~notWriteEnable) begin
data[address] = io;
end
end
always @ (address or notChipEnable or notWriteEnable) begin
if(~notChipEnable&¬WriteEnable) begin
outputData = data[address];
end
end
endmodule