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1
SPICE Version 2G User's Guide
(10 Aug 1981)
A.Vladimirescu, Kaihe Zhang,
A.R.Newton, D.O.Pederson, A.Sangiovanni-Vincentelli
Department of Electrical Engineering and Computer Sciences
University of California
Berkeley, Ca., 94720
Acknowledgement: Dr. Richard Dowell and Dr. Sally Liu have con-
tributed to develop the present SPICE version. SPICE was origi-
nally developed by Dr. Lawrence Nagel and has been modified
extensively by Dr. Ellis Cohen.
SPICE is a general-purpose circuit simulation program for
nonlinear dc, nonlinear transient, and linear ac analyses. Cir-
cuits may contain resistors, capacitors, inductors, mutual induc-
tors, independent voltage and current sources, four types of
dependent sources, transmission lines, and the four most common
semiconductor devices: diodes, BJT's, JFET's, and MOSFET's.
SPICE has built-in models for the semiconductor devices, and
the user need specify only the pertinent model parameter values.
The model for the BJT is based on the integral charge model of
Gummel and Poon; however, if the Gummel- Poon parameters are not
specified, the model reduces to the simpler Ebers-Moll model. In
either case, charge storage effects, ohmic resistances, and a
current-dependent output conductance may be included. The diode
model can be used for either junction diodes or Schottky barrier
2
diodes. The JFET model is based on the FET model of Shichman and
Hodges. Three MOSFET models are implemented; MOS1 is described by
a square-law I-V characteristic MOS2 is an analytical model while
MOS3 is a semi-empirical model. Both MOS2 and MOS3 include
second-order effects such as channel length modulation, subthres-
hold conduction, scattering limited velocity saturation, small-
size effects and charge-controlled capacitances.
1. TYPES OF ANALYSIS
1.1. DC Analysis
The dc analysis portion of SPICE determines the dc operating
point of the circuit with inductors shorted and capacitors
opened. A dc analysis is automatically performed prior to a
transient analysis to determine the transient initial conditions,
and prior to an ac small-signal analysis to determine the linear-
ized, small-signal models for nonlinear devices. If requested,
the dc small-signal value of a transfer function (ratio of output
variable to input source), input resistance, and output resis-
tance will also be computed as a part of the dc solution. The dc
analysis can also be used to generate dc transfer curves: a
specified independent voltage or current source is stepped over a
user-specified range and the dc output variables are stored for
each sequential source value. If requested, SPICE also will
3
determine the dc small-signal sensitivities of specified output
variables with respect to circuit parameters. The dc analysis
options are specified on the .DC, .TF, .OP, and .SENS control
cards.
If one desires to see the small-signal models for nonlinear
devices in conjunction with a transient analysis operating point,
then the .OP card must be provided. The dc bias conditions will
be identical for each case, but the more comprehensive operating
point information is not available to be printed when transient
initial conditions are computed.
1.2. AC Small-Signal Analysis
The ac small-signal portion of SPICE computes the ac output
variables as a function of frequency. The program first computes
the dc operating point of the circuit and determines linearized,
small-signal models for all of the nonlinear devices in the cir-
cuit. The resultant linear circuit is then analyzed over a
user-specified range of frequencies. The desired output of an ac
small- signal analysis is usually a transfer function (voltage
gain, transimpedance, etc). If the circuit has only one ac
input, it is convenient to set that input to unity and zero
phase, so that output variables have the same value as the
transfer function of the output variable with respect to the
input.
4
The generation of white noise by resistors and semiconductor
devices can also be simulated with the ac small-signal portion of
SPICE. Equivalent noise source values are determined automati-
cally from the small-signal operating point of the circuit, and
the contribution of each noise source is added at a given summing
point. The total output noise level and the equivalent input
noise level are determined at each frequency point. The output
and input noise levels are normalized with respect to the square
root of the noise bandwidth and have the units Volts/rt Hz or
Amps/rt Hz. The output noise and equivalent input noise can be
printed or plotted in the same fashion as other output variables.
No additional input data are necessary for this analysis.
Flicker noise sources can be simulated in the noise analysis
by including values for the parameters KF and AF on the appropri-
ate device model cards.
The distortion characteristics of a circuit in the small-
signal mode can be simulated as a part of the ac small-signal
analysis. The analysis is performed assuming that one or two
signal frequencies are imposed at the input.
The frequency range and the noise and distortion analysis
parameters are specified on the .AC, .NOISE, and .DISTO control
lines.
5
1.3. Transient Analysis
The transient analysis portion of SPICE computes the tran-
sient output variables as a function of time over a user-
specified time interval. The initial conditions are automati-
cally determined by a dc analysis. All sources which are not
time dependent (for example, power supplies) are set to their dc
value. For large-signal sinusoidal simulations, a Fourier
analysis of the output waveform can be specified to obtain the
frequency domain Fourier coefficients. The transient time inter-
val and the Fourier analysis options are specified on the .TRAN
and .FOURIER control lines.
1.4. Analysis at Different Temperatures
All input data for SPICE is assumed to have been measured at
27 deg C (300 deg K). The simulation also assumes a nominal tem-
perature of 27 deg C. The circuit can be simulated at other tem-
peratures by using a .TEMP control line.
Temperature appears explicitly in the exponential terms of
the BJT and diode model equations. In addition, saturation
currents have a built-in temperature dependence. The temperature
dependence of the saturation current in the BJT models is deter-
mined by:
IS(T1) = IS(T0)*((T1/T0)**XTI)*exp(q*EG*(T1-T0)/(k*T1*T0))
6
where k is Boltzmann's constant, q is the electronic charge, EG
is the energy gap which is a model parameter, and XTI is the
saturation current temperature exponent (also a model parameter,
and usually equal to 3). The temperature dependence of forward
and reverse beta is according to the formula:
beta(T1)=beta(T0)*(T1/T0)**XTB
where T1 and T0 are in degrees Kelvin, and XTB is a user-supplied
model parameter. Temperature effects on beta are carried out by
appropriate adjustment to the values of BF, ISE, BR, and ISC.
Temperature dependence of the saturation current in the junction
diode model is determined by:
IS(T1) = IS(T0)*((T1/T0)**(XTI/N))*exp(q*EG*(T1-T0)/(k*N*T1*T0))
where N is the emission coefficient, which is a model parameter,
and the other symbols have the same meaning as above. Note that
for Schottky barrier diodes, the value of the saturation current
temperature exponent, XTI, is usually 2.
Temperature appears explicitly in the value of junction
potential, PHI, for all the device models. The temperature
dependence is determined by:
PHI(TEMP) = k*TEMP/q*log(Na*Nd/Ni(TEMP)**2)
where k is Boltzmann's constant, q is the electronic charge, Na
is the acceptor impurity density, Nd is the donor impurity den-
7
sity, Ni is the intrinsic concentration, and EG is the energy
gap.
Temperature appears explicitly in the value of surface
mobility, UO, for the MOSFET model. The temperature dependence
is determined by:
UO(TEMP) = UO(TNOM)/(TEMP/TNOM)**(1.5)
The effects of temperature on resistors is modeled by the for-
mula:
value(TEMP) = value(TNOM)*(1+TC1*(TEMP-TNOM)+TC2*(TEMP-TNOM)**2))
where TEMP is the circuit temperature, TNOM is the nominal tem-
perature, and TC1 and TC2 are the first- and second-order tem-
perature coefficients.
2. CONVERGENCE
Both dc and transient solutions are obtained by an iterative
process which is terminated when both of the following conditions
hold:
1) The nonlinear branch currents converge to within a tolerance
of 0.1 percent or 1 picoamp (1.0E-12 Amp), whichever is
larger.
8
2) The node voltages converge to within a tolerance of 0.1 per-
cent or 1 microvolt (1.0E-6 Volt), whichever is larger.
Although the algorithm used in SPICE has been found to be
very reliable, in some cases it will fail to converge to a solu-
tion. When this failure occurs, the program will print the node
voltages at the last iteration and terminate the job. In such
cases, the node voltages that are printed are not necessarily
correct or even close to the correct solution.
Failure to converge in the dc analysis is usually due to an
error in specifying circuit connections, element values, or model
parameter values. Regenerative switching circuits or circuits
with positive feedback probably will not converge in the dc
analysis unless the OFF option is used for some of the devices in
the feedback path, or the .NODESET card is used to force the cir-
cuit to converge to the desired state.
3. INPUT FORMAT
The input format for SPICE is of the free format type.
Fields on a card are separated by one or more blanks, a comma, an
equal (=) sign, or a left or right parenthesis; extra spaces are
ignored. A card may be continued by entering a + (plus) in
column 1 of the following card; SPICE continues reading begin-
ning with column 2.
9
A name field must begin with a letter (A through Z) and can-
not contain any delimiters. Only the first eight characters of
the name are used.
A number field may be an integer field (12, -44), a floating
point field (3.14159), either an integer or floating point number
followed by an integer exponent (1E-14, 2.65E3), or either an
integer or a floating point number followed by one of the follow-
ing scale factors:
T=1E12 G=1E9 MEG=1E6 K=1E3 MIL=25.4E-6
M=1E-3 U=1E-6 N=1E-9 P=1E-12 F=1E-15
Letters immediately following a number that are not scale factors
are ignored, and letters immediately following a scale factor are
ignored. Hence, 10, 10V, 10VOLTS, and 10HZ all represent the
same number, and M, MA, MSEC, and MMHOS all represent the same
scale factor. Note that 1000, 1000.0, 1000HZ, 1E3, 1.0E3, 1KHZ,
and 1K all represent the same number.
4. CIRCUIT DESCRIPTION
The circuit to be analyzed is described to SPICE by a set of
element cards, which define the circuit topology and element
values, and a set of control cards, which define the model param-
eters and the run controls. The first card in the input deck
10
must be a title card, and the last card must be a .END card. The
order of the remaining cards is arbitrary (except, of course,
that continuation cards must immediately follow the card being
continued).
Each element in the circuit is specified by an element card
that contains the element name, the circuit nodes to which the
element is connected, and the values of the parameters that
determine the electrical characteristics of the element. The
first letter of the element name specifies the element type. The
format for the SPICE element types is given in what follows. The
strings XXXXXXX, YYYYYYY, and ZZZZZZZ denote arbitrary
alphanumeric strings. For example, a resistor name must begin
with the letter R and can contain from one to eight characters.
Hence, R, R1, RSE, ROUT, and R3AC2ZY are valid resistor names.
Data fields that are enclosed in lt and gt signs '< >' are
optional. All indicated punctuation (parentheses, equal signs,
etc.) are required. With respect to branch voltages and
currents, SPICE uniformly uses the associated reference conven-
tion (current flows in the direction of voltage drop).
Nodes must be nonnegative integers but need not be numbered
sequentially. The datum (ground) node must be numbered zero.
The circuit cannot contain a loop of voltage sources and/or
inductors and cannot contain a cutset of current sources and/or
capacitors. Each node in the circuit must have a dc path to
11
ground. Every node must have at least two connections except for
transmission line nodes (to permit unterminated transmission
lines) and MOSFET substrate nodes (which have two internal con-
nections anyway).
5. TITLE CARD, COMMENT CARDS AND .END CARD
5.1. Title Card
Examples:
POWER AMPLIFIER CIRCUIT
TEST OF CAM CELL
This card must be the first card in the input deck. Its
contents are printed verbatim as the heading for each section of
output.
5.2. .END Card
Examples:
.END
This card must always be the last card in the input deck.
Note that the period is an integral part of the name.
12
5.3. Comment Card
General Form:
* <any comment>
Examples:
* RF=1K GAIN SHOULD BE 100
* MAY THE FORCE BE WITH MY CIRCUIT
The asterisk in the first column indicates that this card is
a comment card. Comment cards may be placed anywhere in the cir-
cuit description.
6. ELEMENT CARDS
6.1. Resistors
General form:
RXXXXXXX N1 N2 VALUE <TC=TC1<,TC2>>
Examples:
R1 1 2 100
RC1 12 17 1K TC=0.001,0.015
N1 and N2 are the two element nodes. VALUE is the resis-
tance (in ohms) and may be positive or negative but not zero.
13
TC1 and TC2 are the (optional) temperature coefficients; if not
specified, zero is assumed for both. The value of the resistor
as a function of temperature is given by:
value(TEMP) = value(TNOM)*(1+TC1*(TEMP-TNOM)+TC2*(TEMP-TNOM)**2))
6.2. Capacitors and Inductors
General form:
CXXXXXXX N+ N- VALUE <IC=INCOND>
LYYYYYYY N+ N- VALUE <IC=INCOND>
Examples:
CBYP 13 0 1UF
COSC 17 23 10U IC=3V
LLINK 42 69 1UH
LSHUNT 23 51 10U IC=15.7MA
N+ and N- are the positive and negative element nodes,
respectively. VALUE is the capacitance in Farads or the induc-
tance in Henries.
For the capacitor, the (optional) initial condition is the
initial (time-zero) value of capacitor voltage (in Volts). For
the inductor, the (optional) initial condition is the initial
(time-zero) value of inductor current (in Amps) that flows from
N+, through the inductor, to N-. Note that the initial condi-
tions (if any) apply 'only' if the UIC option is specified on the
14
.TRAN card.
Nonlinear capacitors and inductors can be described.
General form :
CXXXXXXX N+ N- POLY C0 C1 C2 ... <IC=INCOND>
LYYYYYYY N+ N- POLY L0 L1 L2 ... <IC=INCOND>
C0 C1 C2 ...(and L0 L1 L2 ...) are the coefficients of a
polynomial describing the element value. The capacitance is
expressed as a function of the voltage across the element while
the inductance is a function of the current through the inductor.
The value is computed as
value=C0+C1*V+C2*V**2+...
value=L0+L1*I+L2*I**2+...
where V is the voltage across the capacitor and I the
current flowing in the inductor.
6.3. Coupled (Mutual) Inductors
General form:
KXXXXXXX LYYYYYYY LZZZZZZZ VALUE
Examples:
K43 LAA LBB 0.999
KXFRMR L1 L2 0.87
15
LYYYYYYY and LZZZZZZZ are the names of the two coupled
inductors, and VALUE is the coefficient of coupling, K, which
must be greater than 0 and less than or equal to 1. Using the
'dot' convention, place a 'dot' on the first node of each induc-
tor.
6.4. Transmission Lines (Lossless)
General form:
TXXXXXXX N1 N2 N3 N4 Z0=VALUE <TD=VALUE> <F=FREQ <NL=NRMLEN>>
+ <IC=V1,I1,V2,I2>
Examples:
T1 1 0 2 0 Z0=50 TD=10NS
N1 and N2 are the nodes at port 1; N3 and N4 are the nodes
at port 2. Z0 is the characteristic impedance. The length of
the line may be expressed in either of two forms. The transmis-
sion delay, TD, may be specified directly (as TD=10ns, for exam-
ple). Alternatively, a frequency F may be given, together with
NL, the normalized electrical length of the transmission line
with respect to the wavelength in the line at the frequency F.
If a frequency is specified but NL is omitted, 0.25 is assumed
(that is, the frequency is assumed to be the quarter-wave fre-
quency). Note that although both forms for expressing the line
length are indicated as optional, one of the two must be speci-
16
fied.