2828#endif
2929
3030
31- #define NUM_DIGITAL_PINS (15+(NUM_ANALOG_INPUTS))
32- #define NUM_ANALOG_INPUTS 6
33- #define analogInputToDigitalPin (p ) ((p < NUM_ANALOG_INPUTS ) ? (p) + (NUM_DIGITAL_PINS-NUM_ANALOG_INPUTS) : -1)
31+ #define NUM_DIGITAL_PINS 23
32+ #define NUM_ANALOG_INPUTS 9 // skipping A6 and A7, AREF is A8
33+ #define analogInputToDigitalPin (p ) ((p < 9 ) ? (p) + 14 : -1)
3434
3535
3636/* functional pin mapping for the STM8S105 used on the sduino-uno board.
@@ -53,14 +53,15 @@ enum portpin {
5353 PC6 , /* IO11/MOSI PC6 (HS)/SPI_MOSI */
5454 PC7 , /* IO12/MISO PC7 (HS)/SPI_MISO */
5555 PC5 , /* IO13/SCK PC5 (HS)/SPI_SCK */
56- PC2 , /* IO14~ PC2 (HS)/TIM1_CH2 */
57- PE5 , /* IO15/SS PE5/SPI_NSS */
5856 PB0 , /* AD0 PB0/AIN0 [TIM1_CH1N] */
5957 PB1 , /* AD1 PB1/AIN1 [TIM1_CH2N] */
6058 PB2 , /* AD2 PB2/AIN2 [TIM1_CH3N] */
6159 PB3 , /* AD3 PB3/AIN3 [TIM1_ETR] */
6260 PB5 , /* AD4/SDA PB5/AIN5 [I2C_SDA] */
6361 PB4 , /* AD5/SCL PB4/AIN4 [I2C_SCL] */
62+ PF4 = 22 , /* AREF PF4/AIN12 */
63+ PC2 , /* IO23~ PC2 (HS)/TIM1_CH2 */
64+ PE5 , /* IO24/SS PE5/SPI_NSS */
6465};
6566
6667
@@ -70,7 +71,8 @@ enum portpin {
7071 | (p)==14 \
7172 )
7273
73- #define PIN_SPI_SS (PE5) // 15
74+ // TODO: find a way to use pin 10 (PC4) as software controlled SS
75+ #define PIN_SPI_SS (PE5) // 24
7476#define PIN_SPI_MOSI (PC6) // 11
7577#define PIN_SPI_MISO (PC7) // 12
7678#define PIN_SPI_SCK (PC5) // 13
@@ -103,12 +105,12 @@ static const uint8_t SCL = PIN_WIRE_SCL;
103105
104106#define LED_BUILDIN (PC5) // pin for the buildin LED, pin 13
105107
106- #define PIN_A0 (PB0) // 16 , Ain0
107- #define PIN_A1 (PB1) // 17 , Ain1
108- #define PIN_A2 (PB2) // 18 , Ain2
109- #define PIN_A3 (PB3) // 19 , Ain3
110- #define PIN_A4 (PB5) // 20 , Ain5
111- #define PIN_A5 (PB4) // 21 , Ain4
108+ #define PIN_A0 (PB0) // 14 , Ain0
109+ #define PIN_A1 (PB1) // 15 , Ain1
110+ #define PIN_A2 (PB2) // 16 , Ain2
111+ #define PIN_A3 (PB3) // 17 , Ain3
112+ #define PIN_A4 (PB5) // 18 , Ain5
113+ #define PIN_A5 (PB4) // 19 , Ain4
112114
113115/* SDCC workaround
114116static const uint8_t A0 = PIN_A0;
@@ -126,20 +128,23 @@ static const uint8_t A4 = PIN_A4;
126128
127129//#define NO_ANALOG 0xff
128130
129- // map the logical pin numbers to the physical ADC channels:
130- // pin 20,21 -> channel 5,4 (reverse order!)
131- // pin 16..19 -> channel 0-3
131+ // map the logical pin numbers to the physical ADC channels: FIXME: produces rubbish for pins 20 and 21
132+ // pin 22 -> channel 12
133+ // pin 18,19 -> channel 5,4 (reverse order!)
134+ // pin 14..17 -> channel 0-3
132135// smaller numbers are not modified but used as channel numbers directly.
133- #define analogPinToChannel (P ) ( (P)>=20 ? 25-(P) : ( \
134- (P)>=16 ? (P)-16 : \
136+ #define analogPinToChannel (P ) ( (P)==22 ? 12 : ( \
137+ (P)>=18 ? 23-(P) : ( \
138+ (P)>=14 ? (P)-14 : \
135139 (P) \
136- ))
140+ )))
137141
138142/* alternative way to define the mapping:
139- #define analogPinToChannel(P) ( (P)<16 ? (P) : ( \
140- (P)<20 ? (P)-16 : \
141- 25-(P) \
142- ))
143+ #define analogPinToChannel(P) ( (P)<14 ? (P) : ( \
144+ (P)<18 ? (P)-14 : ( \
145+ (p)!=22 ? 23-(P) : \
146+ 12 \
147+ )))
143148*/
144149
145150
@@ -154,8 +159,36 @@ static const uint8_t A4 = PIN_A4;
154159
155160#ifdef ARDUINO_MAIN
156161
157- // sduino-uno board featuring a STM8S105K6 CPU
158- // from https://github.com/roybaer/sduino_uno
162+ // STMicroelectronics STM8S105K6T, -K6U
163+ //
164+ // pwm PWM PWM PWM PWM
165+ // D2 D0 D1 D5 D6 D3 D7 D4
166+ // PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
167+ // 32 31 30 29 28 27 26 25
168+ // +--------------------------------+
169+ // NRST 1 | o | 24 PC7 D12
170+ // | |
171+ // PA1 2 | | 23 PC6 D11
172+ // | |
173+ // PA2 3 | | 22 PC5 D13
174+ // | |
175+ // VSS 4 | | 21 PC4 D10 PWM
176+ // | |
177+ // VCAP 5 | | 20 PC3 D9 PWM
178+ // | |
179+ // VDD 6 | | 19 PC2 D23 PWM
180+ // | |
181+ // VDDIO 7 | | 18 PC1 D8 PWM
182+ // | |
183+ // AREF/A8 PF4 8 | | 17 PE5 D24
184+ // +--------------------------------+
185+ // 9 10 11 12 13 14 15 16
186+ // VDDA VSSA PB5 PB4 PB3 PB2 PB1 PB0
187+ // A4 A5 A3 A2 A1 A0
188+ // pwm pwm pwm
189+ //
190+ // (PWM: always available as PWM)
191+ // (pwm: PWM as alternate function -- en-/disabled for all such pins at once)
159192
160193// these arrays map port names (e.g. port B) to the
161194// appropriate addresses for various functions (e.g. reading
@@ -167,6 +200,7 @@ const uint16_t PROGMEM port_to_mode_PGM[] = {
167200 GPIOC_BaseAddress + 2 ,
168201 GPIOD_BaseAddress + 2 ,
169202 GPIOE_BaseAddress + 2 ,
203+ GPIOF_BaseAddress + 2 ,
170204/*
171205 (uint16_t) &GPIOA->DDR,
172206 (uint16_t) &GPIOB->DDR,
@@ -182,6 +216,7 @@ const uint16_t PROGMEM port_to_output_PGM[] = {
182216 GPIOC_BaseAddress ,
183217 GPIOD_BaseAddress ,
184218 GPIOE_BaseAddress ,
219+ GPIOF_BaseAddress ,
185220/*
186221 (uint16_t) &GPIOA->ODR,
187222 (uint16_t) &GPIOB->ODR,
@@ -197,6 +232,7 @@ const uint16_t PROGMEM port_to_input_PGM[] = {
197232 GPIOC_BaseAddress + 1 ,
198233 GPIOD_BaseAddress + 1 ,
199234 GPIOE_BaseAddress + 1 ,
235+ GPIOF_BaseAddress + 1 ,
200236/*
201237 (uint16_t) &GPIOA->IDR,
202238 (uint16_t) &GPIOB->IDR,
@@ -220,14 +256,17 @@ const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
220256 PC ,
221257 PC ,
222258 PC ,
223- PC ,
224- PE , /* 15 */
225- PB , /* 16 */
259+ PB , /* 14 */
260+ PB ,
261+ PB ,
262+ PB ,
226263 PB ,
227264 PB ,
228265 PB ,
229266 PB ,
230- PB , /* 21 */
267+ PF , /* 22 */
268+ PC , /* 23 */
269+ PE , /* 24 */
231270};
232271
233272const uint8_t PROGMEM digital_pin_to_bit_mask_PGM [] = {
@@ -245,14 +284,17 @@ const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
245284 _BV (6 ),
246285 _BV (7 ),
247286 _BV (5 ),
248- _BV (2 ),
249- _BV (5 ), /* 15, port E */
250- _BV (0 ), /* 16, port B */
287+ _BV (0 ), /* 14, port B */
251288 _BV (1 ),
252289 _BV (2 ),
253290 _BV (3 ),
254291 _BV (5 ),
255292 _BV (4 ),
293+ _BV (6 ),
294+ _BV (7 ),
295+ _BV (4 ), /* 22, port F */
296+ _BV (2 ), /* 23, port C */
297+ _BV (5 ), /* 24, port E */
256298};
257299
258300const uint8_t PROGMEM digital_pin_to_timer_PGM [] = {
@@ -270,14 +312,17 @@ const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
270312 NOT_ON_TIMER ,
271313 NOT_ON_TIMER ,
272314 NOT_ON_TIMER ,
273- TIMER12 , // 14
274315 NOT_ON_TIMER ,
275316 NOT_ON_TIMER ,
276317 NOT_ON_TIMER ,
277318 NOT_ON_TIMER ,
278319 NOT_ON_TIMER ,
279320 NOT_ON_TIMER ,
280321 NOT_ON_TIMER ,
322+ NOT_ON_TIMER ,
323+ NOT_ON_TIMER ,
324+ TIMER12 , // 23
325+ NOT_ON_TIMER ,
281326};
282327
283328#endif
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