Commits

Branch selector

 main

User selector

All users

All time

Commit History

Commits on Apr 17, 2025

• c: Update the union definition

  Show description for 406058a
  turran

  committed
  406058a

  Copy full SHA for 406058a

• avx: Load OrcConstant always

  Show description for a9937ef
  turran

  committed
  a9937ef

  Copy full SHA for a9937ef

• sse: Load OrcConstant always

  Show description for 0fbdb19
  turran

  committed
  0fbdb19

  Copy full SHA for 0fbdb19

• mmx: Load OrcConstant always

  Show description for 08134e6
  turran

  committed
  08134e6

  Copy full SHA for 08134e6

• x86: Simplify the constant loading to always use OrcConstant

  Show description for d89fab6
  turran

  committed
  d89fab6

  Copy full SHA for d89fab6

• mmx: Add 64-bit mov instruction

  Show description for fb8fa8d
  turran

  committed
  fb8fa8d

  Copy full SHA for fb8fa8d

• compiler,target: Use a common interface for loading constants

  Show description for 036e74b
  turran

  committed
  036e74b

  Copy full SHA for 036e74b

Commits on Apr 15, 2025

• constant: Improve the constant handling

  Show description for 755b9b3
  turran

  committed
  755b9b3

  Copy full SHA for 755b9b3

Commits on Apr 9, 2025

• utils: Include 8-bit fields on the 64-bit union

  Show description for f1a7696
  turran

  committed
  f1a7696

  Copy full SHA for f1a7696

Commits on Apr 4, 2025

• mmx: Use the proper MMX flag for such instructions

  Show description for c631234
  

  turran

  authored and

  GStreamer Marge Bot

  committed
  c631234

  Copy full SHA for c631234

• x86: Have target flags per target

  Show description for 88ff685
  

  turran

  authored and

  GStreamer Marge Bot

  committed
  88ff685

  Copy full SHA for 88ff685

Commits on Mar 24, 2025

• avx: add convuusql

  Show description for 7977040
  amyspark

  committed
  7977040

  Copy full SHA for 7977040

• avx: add convsusql

  Show description for 8e9b6c6
  amyspark

  committed
  8e9b6c6

  Copy full SHA for 8e9b6c6

• avx: add convussql

  Show description for 424d3ae
  amyspark

  committed
  424d3ae

  Copy full SHA for 424d3ae

• x86: Add convuuslw

  Show description for 50b87e8
  amyspark

  committed
  50b87e8

  Copy full SHA for 50b87e8

• x86: Add convusslw

  Show description for 8e37d64
  amyspark

  committed
  8e37d64

  Copy full SHA for 8e37d64

• x86: Add convusswb

  Show description for bed26c3
  amyspark

  committed
  bed26c3

  Copy full SHA for bed26c3

Commits on Mar 14, 2025

• meson: test for atomic library

  Show description for e75dd37
  

  mleeman

  authored and

  GStreamer Marge Bot

  committed
  e75dd37

  Copy full SHA for e75dd37

Commits on Mar 5, 2025

• avx: Implement register-based REX.W bit detection

  Show description for e6ae729
  

  amyspark

  and

  turran

  committed
  e6ae729

  Copy full SHA for e6ae729

• x86: Implement immediate operand range validation

  Show description for 26de0b2
  amyspark

  committed
  26de0b2

  Copy full SHA for 26de0b2

• sse: Implement 64-bit single move constant loading

  Show description for f41bb6b
  amyspark

  committed
  f41bb6b

  Copy full SHA for f41bb6b

• avx: Implement 64-bit single move constant loading

  Show description for e42e287
  amyspark

  committed
  e42e287

  Copy full SHA for e42e287

• x86: Fix incorrect limitation of immediate operand to 32-bit max

  Show description for 3bd7231
  amyspark

  committed
  3bd7231

  Copy full SHA for 3bd7231

Commits on Feb 22, 2025

• mmx: Release temp registers once used

  Show description for 9636c05
  turran

  committed
  9636c05

  Copy full SHA for 9636c05

• sse: Release temp registers once used

  Show description for eb6b771
  turran

  committed
  eb6b771

  Copy full SHA for eb6b771

• orccompiler: Be able to release a temp register

  Show description for 1b4f76f
  turran

  committed
  1b4f76f

  Copy full SHA for 1b4f76f

• avx: Make rules work again with constants

  Show description for 403d1b2
  turran

  committed
  403d1b2

  Copy full SHA for 403d1b2

• avx: divluw do not use a constant for modified regs

  Show description for dd16428
  turran

  committed
  dd16428

  Copy full SHA for dd16428

• orccompiler: Make constants work again

  Show description for 03002ca
  turran

  committed
  03002ca

  Copy full SHA for 03002ca

• mips: Use the new compiler interface to reset the temp registers

  Show description for fc0f1ec
  turran

  committed
  fc0f1ec

  Copy full SHA for fc0f1ec

• altivec: Use the new compiler interface to reset the temp registers

  Show description for ac4fed1
  turran

  committed
  ac4fed1

  Copy full SHA for ac4fed1

• x86: Use the proper vector regs offset

  Show description for 5b5d206
  turran

  committed
  5b5d206

  Copy full SHA for 5b5d206

Commits on Feb 21, 2025

• x86: Virtualize the call to zeroupper

  Show description for b7cc4a4
  

  turran

  authored and

  GStreamer Marge Bot

  committed
  b7cc4a4

  Copy full SHA for b7cc4a4

• x86: Install the new headers

  Show description for 25d560d
  

  turran

  authored and

  GStreamer Marge Bot

  committed
  25d560d

  Copy full SHA for 25d560d

• x86: The size should be used only to differentiate registers

  Show description for e73817d
  

  turran

  authored and

  GStreamer Marge Bot

  committed
  e73817d

  Copy full SHA for e73817d