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bus: ti-sysc: Detect i2c interconnect target module based on register layout
We can easily detect i2c based on it's non-standard module registers that consist of two 32-bit registers accessed in 16-bit mode. So far we don't have other 16-bit modules, so there's currently no need to add a custom property for 16-bit register access. Signed-off-by: Tony Lindgren <[email protected]>
1 parent 70a6524 commit a7199e2

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Lines changed: 18 additions & 0 deletions

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drivers/bus/ti-sysc.c

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@@ -213,6 +213,21 @@ static int sysc_check_children(struct sysc *ddata)
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return 0;
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}
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/*
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* So far only I2C uses 16-bit read access with clockactivity with revision
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* in two registers with stride of 4. We can detect this based on the rev
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* register size to configure things far enough to be able to properly read
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* the revision register.
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*/
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static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
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{
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if (resource_size(res) == 8) {
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dev_dbg(ddata->dev,
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"enabling 16-bit and clockactivity quirks\n");
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ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
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}
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}
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/**
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* sysc_parse_one - parses the interconnect target module registers
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* @ddata: device driver data
@@ -243,6 +258,8 @@ static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
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}
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ddata->offsets[reg] = res->start - ddata->module_pa;
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if (reg == SYSC_REVISION)
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sysc_check_quirk_16bit(ddata, res);
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return 0;
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}

include/linux/platform_data/ti-sysc.h

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@@ -41,6 +41,7 @@ struct sysc_regbits {
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s8 emufree_shift;
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};
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#define SYSC_QUIRK_16BIT BIT(2)
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#define SYSC_QUIRK_UNCACHED BIT(1)
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#define SYSC_QUIRK_USE_CLOCKACT BIT(0)
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