Research Experience

Undergraduate Researcher

August 2024 - May 2025

Advised by Gerald Kruse, Juniata College, Huntingdon PA

During my senior year, I conducted independent research in computer architecture, focusing on hardware solutions to the challenges of parallel computing. I designed and implemented Doppio, a novel FPGA-based Memory Management Unit that brings the deterministic execution concepts of Deterministic Parallel Java (DPJ) into hardware. This project emerged from my interest in addressing the stagnation of Moore’s Law through specialized processor architectures and hardware-software co-design approaches.

I developed the core system using SystemVerilog, creating hardware modules including a multi-processor data aggregator and a deterministic MMU capable of handling multiple processor data streams. The MMU features configurable operation modes that can enforce deterministic execution by default or allow explicit non-deterministic behavior when required. Throughout the development process, I gained extensive experience with the complete FPGA workflow using Xilinx Vivado ML, from initial circuit design through behavioral simulation to hardware synthesis and bitstream generation on an Artix A7-100T platform.

To validate my design, I conducted comprehensive hardware verification through testbench development and waveform analysis, ensuring proper sequential state machine operation across clock cycles. I also explored the broader open-source hardware ecosystem by porting and analyzing 64-bit RISC-V multiprocessor systems, particularly the Muntjac processor, which gave me valuable exposure to advanced concepts like TileLink interconnect protocols and cache coherency mechanisms.

This research provided me with hands-on experience in Electronic Design Automation (EDA) tools including FuseSOC, Edalize, and Verilator, while also developing my skills in technical documentation and research methodology. The project represents my exploration into graduate-level research and my commitment to advancing the field of computer architecture through innovative hardware solutions to parallel computing challenges.