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@YosysHQ

Yosys Headquarters

Yosys Open SYnthesis Suite
README.md

YosysHQ - Open Source EDA

OSS CAD Suite: the one-stop shop for our tools

If you want to use our EDA tools, the easiest way is to install the binary release OSS CAD suite, which contains all required dependencies and related tools. Find the documentation here. We also have an OSS CAD Suite github action for using the tools in a github CI workflow.

Tabby CAD Suite is a commercial extension of OSS CAD Suite available from YosysHQ GmbH that additionally includes the Verific frontend for industry-grade SystemVerilog and VHDL support, formal verification with SVA, and formal apps.

Our Projects

Front-ends for applications built on top of Yosys:

  • sby: formal property checking
  • mcy: mutation coverage
  • eqy: equivalence checking

Other notable projects:

  • riscv-formal: formally check compliance with the RISC-V specification
  • picorv32: A Size-Optimized RISC-V CPU
  • nerv: A very simple educational RISC-V CPU for demonstrating riscv-formal

Community

Support us

Like what we do? Please consider either buying a license for the Tabby CAD Suite or becoming a sponsor.

Pinned Loading

  1. yosys yosys Public

    Yosys Open SYnthesis Suite

    C++ 4.3k 1.1k

  2. nextpnr nextpnr Public

    nextpnr portable FPGA place and route tool

    C++ 1.6k 292

  3. sby sby Public

    SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows

    Python 499 89

  4. oss-cad-suite-build oss-cad-suite-build Public

    Multi-platform nightly builds of open source digital design and verification tools

    Shell 1.4k 113

Repositories

Showing 10 of 42 repositories
  • yosys Public

    Yosys Open SYnthesis Suite

    YosysHQ/yosys’s past year of commit activity
    C++ 4,336 ISC 1,053 495 94 Updated Mar 16, 2026
  • nextpnr Public

    nextpnr portable FPGA place and route tool

    YosysHQ/nextpnr’s past year of commit activity
    C++ 1,630 ISC 292 110 (1 issue needs help) 12 Updated Mar 16, 2026
  • oss-cad-suite-build Public

    Multi-platform nightly builds of open source digital design and verification tools

    YosysHQ/oss-cad-suite-build’s past year of commit activity
    Shell 1,385 ISC 113 81 8 Updated Mar 16, 2026
  • apicula Public

    Project Apicula 🐝: bitstream documentation for Gowin FPGAs

    YosysHQ/apicula’s past year of commit activity
    Verilog 647 MIT 86 23 2 Updated Mar 11, 2026
  • abc Public Forked from berkeley-abc/abc

    ABC: System for Sequential Logic Synthesis and Formal Verification

    YosysHQ/abc’s past year of commit activity
    C 32 741 0 2 Updated Mar 9, 2026
  • test-actions Public
    YosysHQ/test-actions’s past year of commit activity
    C++ 0 ISC 1 0 0 Updated Mar 5, 2026
  • mcy Public

    Mutation Cover with Yosys (MCY)

    YosysHQ/mcy’s past year of commit activity
    C++ 91 ISC 15 1 1 Updated Mar 4, 2026
  • eqy Public

    Equivalence checking with Yosys

    YosysHQ/eqy’s past year of commit activity
    C++ 58 11 21 1 Updated Mar 4, 2026
  • sby Public

    SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows

    YosysHQ/sby’s past year of commit activity
    Python 499 89 46 10 Updated Mar 4, 2026
  • riscv-formal Public

    RISC-V Formal Verification Framework

    YosysHQ/riscv-formal’s past year of commit activity
    Verilog 185 ISC 48 7 5 Updated Mar 3, 2026
View all repositories

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