[Codegen][GPU] Move hoisting to interface and add it for barrier ops#23519
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Groverkss merged 3 commits intoiree-org:mainfrom Feb 24, 2026
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[Codegen][GPU] Move hoisting to interface and add it for barrier ops#23519Groverkss merged 3 commits intoiree-org:mainfrom
Groverkss merged 3 commits intoiree-org:mainfrom
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Depends on #23518 , please only review the top commit |
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Interface lgtm, curious about where those extra unit dimensions came from and if they'll break any pattern matches later down the line
compiler/src/iree/compiler/Codegen/LLVMGPU/test/ROCDL/pipeline_igemm_tile_and_fuse.mlir
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Partially Approve. The move of interface looks reasonable to me, thanks for the ping on reviews!
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iree_gpu.barrier_region ops prevent hoisting and only resolve after bufferization. This means that before bufferization, we effectively cannot do any hoisting from loops because they are usually in a barrier region. After bufferization, it's extremely hard to figure out if we can do hoisting because of side effects.
This leads to better codegen in general in TileAndFuse pipeline, generating better barriers in general, because the barrier region is much more restricted. This was manually verified.
The test changes in igemm pipeline are mainly the test being wrong earlier, it was matching some private memory load, instead of the shared memory loads. There was bad barrier placement before this patch because the barrier regions were capturing everything, leading to an extra barrier which got matched.
The patch also moves the hoisting implementation to an interface. This is required, otherwise all codegen patterns start depending on iree gpu dialect, which shouldn't be the case for non gpu code.