No description
- Makefile 87%
- VHDL 7%
- Python 4.2%
- Scheme 1.5%
- Shell 0.2%
- Other 0.1%
| .builds | ||
| sim | ||
| src | ||
| .dir-locals.el | ||
| .envrc | ||
| .gitignore | ||
| LICENSE | ||
| prj.el | ||
| README.md | ||
| readme.org | ||
Alu unit with testbench using osvvm and open-logic.
Run with:
export PRJ=$PWD
Setup env
. .envrc
Using a guix shell container
cd "$PRJ/.builds"
guix time-machine --channels=channels.scm -- package -p "$GUIX_PROFILE" -m manifest.scm
Build osvvm
cd "$PRJ/_deps"
echo "source $::env(OSVVM)/Scripts/StartGHDL.tcl; include $::env(OSVVM)/osvvm/osvvm.pro; include $::env(OSVVM)/Common/build.pro; include $::env(OSVVM_UART)/UART/build.pro" | tclsh
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Run with custom makefile
cd "$PRJ/.builds/ghdl" make __clean_all __include ./makefile.sh make GHDLRUNFLAGS="--stop-time=4us --disp-time --ieee-asserts=enable" run
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Simulate with hdlmake
cd "$PRJ/.builds/hdlmk/sim.ghdl" hdlmake && make
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Synthesis with hdlmake
cd "$PRJ/.builds/hdlmk/synth.ghdl" hdlmake && make