This sub-project implements a small 8-bit fixed-point neural network on RP2040. It receives input data over I2C1 in slave mode, runs a 1-hidden-layer ReLU network, and exposes control/output over I2C0 in slave mode.

• Input side: I2C1 slave (raw packet input)
• Output/control side: I2C0 slave (register map)
• Network: 41 input bytes → 100 hidden → 200 output, ReLU activation
• Backprop: Single-pass update when control bit 2 is set
• Output FIFO: 16 entries, each entry = 5 bytes (ID + max value + female value + male value + user ID)

Address = $0x60 + (A2\ll2) + (A1\ll1) + (A0\ll0)$ (pulled up by default).

• Packet size: 41 bytes
• Byte 0: Header 0xAA
• Bytes 1–40: input data bytes

Derived from $f_s=16000$, $N=256$, start bin 8 (500 Hz), with 40 output bins formed by summing pairs of FFT bins across the 500–5500 Hz range. Approximate bin centers are:

$$f_{bin}(n) = 500 + 125n;\text{Hz},\quad n=0\ldots39$$

The input buffer size matches the output of the Speech_Recognition_AudioCapture output and the I2C_TestDevice input buffer size (41 bytes).

• Capacity: 16 entries
• Stored when the highest output neuron exceeds 80% (value ≥ 204)
• Each FIFO entry is 5 bytes:
  • Byte 1: highest-value output neuron ID
  • Byte 2: highest-value neuron output
  • Byte 3: female neuron output value
  • Byte 4: male neuron output value
  • Byte 5: user ID (0 = unknown, 1-20 = known users)

The phoneme IDs match the microSD PhonemeList.txt. IDs 0x00–0x01 are reserved for speaker features.

User-ID classification neurons are mapped to output neurons 50-69:

• Neuron 50 -> user ID 1
• ...
• Neuron 69 -> user ID 20

If no user neuron exceeds threshold, user ID is reported as 0 (Unknown).

WORD_RDY is asserted when either inter-word or inter-sentence silence neurons are active and the output FIFO contains non-silence data.

• Silence-word and silence-sentence entries are only added if no non-silence data is already in the FIFO.
• If the last FIFO entry is silence-word and a silence-sentence entry is generated, the silence-word entry is replaced by the silence-sentence entry.

I2C0 always receives a register byte first. Read/write behavior depends on the selected register.

• Read: returns byte at Register 2 pointer, then increments pointer
• Write: writes byte to pointer, then increments pointer

• Read: returns oldest FIFO entry and removes it
• Byte order:
  • Byte 1: neuron ID
  • Byte 2: max neuron value
  • Byte 3: female neuron value
  • Byte 4: male neuron value
  • Byte 5: user ID (0 = unknown)

Use 0x06 and 0x07 to select the output neuron and its weight index (0–99). Read/write 0x08 to access the signed 8-bit weight value.

Use 0x09 to select the hidden neuron (0–99). Use 0x0A to set the 16-bit input index (0–40). Read/write 0x0B to access the signed 8-bit weight value.

Page mode provides fast bulk access with auto-incrementing address and length decrement.

Modes (REG 0x0C):

• 0x01 = W1 (hidden weights, size $100\times41$)
• 0x02 = B1 (hidden bias, size 100)
• 0x03 = W2 (output weights, size $200\times100$)
• 0x04 = B2 (output bias, size 200)
• 0x05 = INPUT (input buffer, size 41)

Usage:

1. Set 0x0C (mode)
2. Set 0x0D (start address, 16-bit)
3. Set 0x0E (length, 16-bit)
4. Stream bytes via 0x0F (read or write). Each byte auto-increments the address and decrements length.

cd Speech_Process_8bit_relu
mkdir -p build
cd build
cmake ..
ninja

• All math is fixed-point, 8-bit weights and activations.
• Backprop runs a single pass and clears control bit 2 when complete.
• Neural network runs on Core 1; I2C and control logic run on Core 0.