example output and construction photos

• icestorm opensource FPGA tools.
• mystorm open hardware FPGA development board
• gtkwave for debugging.

• Obijuan's FPGA tutorial
• FPGAwars forum
• Dan's FPGA blog

• system overview diagram
• Yosys can generate output graphs of the verilog with the show command.
• schematic for mystorm
• ICEfloorplan can be used to show how the design is laid out on the FPGA
• All Verilog source and tests

make

To program the mystorm board, first start a terminal listening on /dev/ttyUSBX at 115200 baud, and reset the board. Then type:

make prog

many test benches are in tests. They can be simulated and outputs viewed with gtkwave:

make debug-[name of verilog file]

eg

make debug-bresenham

Instructions here

Using the SRAM on the back of the board for persistant graffitis. This caused 2 major issues:

• PLL and SRAM pins collide on the board layout
• switching the SB_IO pins and SRAM pins at the same time caused instability.

• (breakout board)[https://github.com/mattvenn/kicad/tree/master/wiimote-fpga)
• 25mhz supplied on clock pin
• reset high to run
• wiimote camera PCB was tested with branch wii-pcb

Started off with this youtube series:https://www.youtube.com/watch?v=rWzB5hZlqBA by Tom Briggs.

In Tom's design, the I2C clock is assigned to the state machine's !clk.

Writing and requesting data was easy, but reading the data was difficult to synchronize the clock. I then tried 2 different approaches:

• separating the I2C clock and state machine clock to give more time for reading data (4 state machine clocks for 1 I2C clock)
• generating the clock within the state machine itself.

Option 2 proved much easier to write. I also found this brief Q&A on reddit on the same topic

based on Hamster's minimal DVI-D VHDL