A hardware capable of generating hash code, using SHA-256 algorithm, for a given input of message is designed. The hardware was designed with the constraint of message length restricted to 55 characters. The hardware reads in the message from the predefined message memory and creates a 512 –bit M block, which in turn was used to create a M_1 array of 16 elements. W vector of 64 elements was created from the M_1 array using standard operations. K and H vector required for hash generation are read from the K and H memory respectively. Standard defined operations are performed on the elements of H vector using the elements of H, K and W. Finally the result from those operations are combined with the initial values of H vector to generate Hash code which is in turn written to an output memory.