TST: fix POWER VSX feature mapping by abslock128w · Pull Request #30801 · numpy/numpy

abslock128w · 2026-02-08T11:32:44Z

** Problem**
On POWER systems, the CPU feature tests check for a literal "VSX" flag in AT_HWCAP. However, Linux never reports a "VSX" auxv flag. VSX is a baseline capability implied by POWER ISA ≥ 2.06, so the test-side detection incorrectly reports VSX as unavailable, causing false failures on POWER (e.g. Power10,power9).

turns out theres another issue too - on some POWER systems AT_HWCAP shows up in hex format like 0xdc0065c2 instead of the string format with actual flag names. the existing load_flags_auxv() only works with string format so it just fails when its hex.

This PR

Maps VSX to ARCH_2_06, VSX2 to ARCH_2_07, VSX3 to ARCH_3_00, and VSX4 to ARCH_3_1B (fixed typo from ARCH_3_1)
Parses AT_PLATFORM to figure out the POWER generation (power7, power8, power9, power10 etc)
Uses the platform info to add the right ARCH flags based on which POWER version it is
Works on both hex and string AUXV formats now

Changes
1.fixed the features_map with correct ISA levels
2.rewrote load_flags() to check AT_PLATFORM and infer ISA levels from that
3.added _get_platform() helper to get the platform string

Note
test-only change, no runtime behavior modified. should work on both POWER9 and POWER10 now.

Fixes gh-30529

nwf · 2026-02-08T18:12:22Z

Alas, this still seems wonky on my Power9 machine. Applying this patch to nixpkgs' packaging of 2.3.5, I get

numpy>  NAME: 'VSX'                                                                                                                                           
numpy>  ACTUAL: True                                                                                                                                          
numpy>  DESIRED: False                                                                                                                                        
numpy>                                                                                                                                                                                                                                                                                                                       
numpy> ###########################################                                                                                                            
numpy> ### Extra debugging information                                                                                                                        
numpy> ###########################################                                                                                                            
numpy> -------------------------------------------                                                                                                            
numpy> --- NumPy Detections                                                                                                                                                                                                                                                                                                  
numpy> -------------------------------------------                                                                                                            
numpy> {MMX: False, SSE: False, SSE2: False, SSE3: False, SSSE3: False, SSE41: False, POPCNT: False, SSE42: False, AVX: False, F16C: False, XOP: False, FMA4: False, FMA3: False, AVX2: False, AVX512F: False, AVX512CD: False, AVX512ER: False, AVX512PF: False, AVX5124FMAPS: False, AVX5124VNNIW: False, AVX512VPOPCNTDQ: 
False, AVX512VL: False, AVX512BW: False, AVX512DQ: False, AVX512VNNI: False, AVX512IFMA: False, AVX512VBMI: False, AVX512VBMI2: False, AVX512BITALG: False, AVX512FP16: False, AVX512_KNL: False, AVX512_KNM: False, AVX512_SKX: False, AVX512_CLX: False, AVX512_CNL: False, AVX512_ICL: False, AVX512_SPR: False, VSX: True
, VSX2: True, VSX3: True, VSX4: False, VX: False, VXE: False, VXE2: False, NEON: False, NEON_FP16: False, NEON_VFPV4: False, ASIMD: False, FPHP: False, ASIMDHP: False, ASIMDDP: False, ASIMDFHM: False, SVE: False, RVV: False, LSX: False}

and
LD_SHOW_AUXV reports AT_HWCAP: true_le archpmu vsx arch_2_06 dfp ic_snoop smt mmu fpu altivec ppc64 ppc32

abslock128w · 2026-02-08T18:21:18Z

Hmm
The pr fixes how VSX is detected
But this failure is coming from how the test decides what shud exist.
The tests are assuming vsx is an optional feature that must appear as a standalone capability.
But on power vsx is not an optional extension
And hence test baseline on power is incorrect.
prolly why this error comes up
Will try to see whats the issue

abslock128w · 2026-02-08T18:53:51Z

Alas, this still seems wonky on my Power9 machine. Applying this patch to nixpkgs' packaging of 2.3.5, I get

numpy>  NAME: 'VSX'                                                                                                                                           
numpy>  ACTUAL: True                                                                                                                                          
numpy>  DESIRED: False                                                                                                                                        
numpy>                                                                                                                                                                                                                                                                                                                       
numpy> ###########################################                                                                                                            
numpy> ### Extra debugging information                                                                                                                        
numpy> ###########################################                                                                                                            
numpy> -------------------------------------------                                                                                                            
numpy> --- NumPy Detections                                                                                                                                                                                                                                                                                                  
numpy> -------------------------------------------                                                                                                            
numpy> {MMX: False, SSE: False, SSE2: False, SSE3: False, SSSE3: False, SSE41: False, POPCNT: False, SSE42: False, AVX: False, F16C: False, XOP: False, FMA4: False, FMA3: False, AVX2: False, AVX512F: False, AVX512CD: False, AVX512ER: False, AVX512PF: False, AVX5124FMAPS: False, AVX5124VNNIW: False, AVX512VPOPCNTDQ: 
False, AVX512VL: False, AVX512BW: False, AVX512DQ: False, AVX512VNNI: False, AVX512IFMA: False, AVX512VBMI: False, AVX512VBMI2: False, AVX512BITALG: False, AVX512FP16: False, AVX512_KNL: False, AVX512_KNM: False, AVX512_SKX: False, AVX512_CLX: False, AVX512_CNL: False, AVX512_ICL: False, AVX512_SPR: False, VSX: True
, VSX2: True, VSX3: True, VSX4: False, VX: False, VXE: False, VXE2: False, NEON: False, NEON_FP16: False, NEON_VFPV4: False, ASIMD: False, FPHP: False, ASIMDHP: False, ASIMDDP: False, ASIMDFHM: False, SVE: False, RVV: False, LSX: False}

and LD_SHOW_AUXV reports AT_HWCAP: true_le archpmu vsx arch_2_06 dfp ic_snoop smt mmu fpu altivec ppc64 ppc32

i have made a new commit
i think this shud work...
not on my pc rn so cant test it out as of now but will do it in a bit...
do lmk if anything,

Update features map and load_flags method for POWER architecture detection.

abslock128w · 2026-02-08T19:16:56Z

Alas, this still seems wonky on my Power9 machine. Applying this patch to nixpkgs' packaging of 2.3.5, I get

numpy>  NAME: 'VSX'                                                                                                                                           
numpy>  ACTUAL: True                                                                                                                                          
numpy>  DESIRED: False                                                                                                                                        
numpy>                                                                                                                                                                                                                                                                                                                       
numpy> ###########################################                                                                                                            
numpy> ### Extra debugging information                                                                                                                        
numpy> ###########################################                                                                                                            
numpy> -------------------------------------------                                                                                                            
numpy> --- NumPy Detections                                                                                                                                                                                                                                                                                                  
numpy> -------------------------------------------                                                                                                            
numpy> {MMX: False, SSE: False, SSE2: False, SSE3: False, SSSE3: False, SSE41: False, POPCNT: False, SSE42: False, AVX: False, F16C: False, XOP: False, FMA4: False, FMA3: False, AVX2: False, AVX512F: False, AVX512CD: False, AVX512ER: False, AVX512PF: False, AVX5124FMAPS: False, AVX5124VNNIW: False, AVX512VPOPCNTDQ: 
False, AVX512VL: False, AVX512BW: False, AVX512DQ: False, AVX512VNNI: False, AVX512IFMA: False, AVX512VBMI: False, AVX512VBMI2: False, AVX512BITALG: False, AVX512FP16: False, AVX512_KNL: False, AVX512_KNM: False, AVX512_SKX: False, AVX512_CLX: False, AVX512_CNL: False, AVX512_ICL: False, AVX512_SPR: False, VSX: True
, VSX2: True, VSX3: True, VSX4: False, VX: False, VXE: False, VXE2: False, NEON: False, NEON_FP16: False, NEON_VFPV4: False, ASIMD: False, FPHP: False, ASIMDHP: False, ASIMDDP: False, ASIMDFHM: False, SVE: False, RVV: False, LSX: False}

and LD_SHOW_AUXV reports AT_HWCAP: true_le archpmu vsx arch_2_06 dfp ic_snoop smt mmu fpu altivec ppc64 ppc32

i have made a new commit i think this shud work... not on my pc rn so cant test it out as of now but will do it in a bit... do lmk if anything,

acutally gimme an hour or so imma look into it carefully and try to fix it, dont wanna jump to conclusions without testing it out myself... if u wanna u can feel free to try it out

nwf · 2026-02-08T20:10:21Z

FWIW, applying e9376e8 (and the other two commits in this PR) makes the tests pass on my machine.

abslock128w · 2026-02-09T02:10:17Z

FWIW, applying e9376e8 (and the other two commits in this PR) makes the tests pass on my machine.
Glad to hear that!

seberg

LGTM, @abslock128w thanks and also thanks @nwf for testing! Feels a bit funky to run that /bin/true, but as it is a test that seems solid enough.

@abslock128w can you do a quick follow-up to strip trailing whitespace? The linter is unhappy (otherwise one of us will probably just do that soon and merge).

abslock128w · 2026-02-09T08:32:55Z

LGTM, @abslock128w thanks and also thanks @nwf for testing! Feels a bit funky to run that /bin/true, but as it is a test that seems solid enough.

@abslock128w can you do a quick follow-up to strip trailing whitespace? The linter is unhappy (otherwise one of us will probably just do that soon and merge).

hey there thanks for the feedback!!
ill get back home and get it done, little busy as of now...

abslock128w · 2026-02-11T01:15:14Z

LGTM, @abslock128w thanks and also thanks @nwf for testing! Feels a bit funky to run that /bin/true, but as it is a test that seems solid enough.

@abslock128w can you do a quick follow-up to strip trailing whitespace? The linter is unhappy (otherwise one of us will probably just do that soon and merge).
Hey there i have made the requested changes....

seberg · 2026-02-11T07:41:20Z

@abslock128w one thing I still wonder about this PR: Did you also test this, or just based on @nwf testing for whether this actually works?

abslock128w · 2026-02-12T09:49:19Z

@abslock128w one thing I still wonder about this PR: Did you also test this, or just based on @nwf testing for whether this actually works?

i mean its based on nwf's testing
i will test it out if u want me to!
i didnt since he mentioned that it worked...

nwf · 2026-02-12T15:13:19Z

It sounds like you have a POWER10 machine, and perhaps others, to test on? That'd be good to do, since I have only a POWER9 machine. :)

abslock128w · 2026-02-13T05:16:53Z

It sounds like you have a POWER10 machine, and perhaps others, to test on? That'd be good to do, since I have only a POWER9 machine. :)
As of now i have a POWER10 and an x86 machine so...
ill test on it and check it out...

charris · 2026-03-24T23:21:15Z

@abslock128w Ping. A new 2.4 release is coming up, it would nice to have this fix in it.

abslock128w · 2026-03-25T00:53:18Z

@abslock128w Ping. A new 2.4 release is coming up, it would nice to have this fix in it.

Hey there Charles,
I am really sorry for the delay i I have been really busy with drafting my gsoc proposal and clg work...
I will get it done by tonight!
Thank you

abslock128w · 2026-03-26T05:52:01Z

@abslock128w Ping. A new 2.4 release is coming up, it would nice to have this fix in it.

Hey there Charles, I am really sorry for the delay i I have been really busy with drafting my gsoc proposal and clg work... I will get it done by tonight! Thank you

i have tested out the tests pass on my machine too!

charris · 2026-03-26T17:30:59Z

Thanks @abslock128w @nwf .

TST: fix POWER VSX feature mapping (#30801)

fix POWER VSX test feature mapping

0576d7c

github-actions bot added the 05 - Testing label Feb 8, 2026

treat VSX as baseline in CPU feature tests

4f671d8

fix POWER VSX feature detection using platform inference

e9376e8

Update features map and load_flags method for POWER architecture detection.

seberg approved these changes Feb 9, 2026

View reviewed changes

seberg added the 09 - Backport-Candidate PRs tagged should be backported label Feb 9, 2026

Black space formatting

330acf0

removed the one trailing space i fogot about+_+

2d95860

abslock128w requested a review from seberg February 11, 2026 07:31

Update test_cpu_features.py

0c4124b

charris merged commit d6b70c4 into numpy:main Mar 26, 2026
79 of 80 checks passed

charris pushed a commit to charris/numpy that referenced this pull request Mar 26, 2026

TST: fix POWER VSX feature mapping (numpy#30801)

9e496cb

charris mentioned this pull request Mar 26, 2026

TST: fix POWER VSX feature mapping (#30801) #31079

Merged

charris added a commit that referenced this pull request Mar 26, 2026

Merge pull request #31079 from charris/backport-20801

533a6db

TST: fix POWER VSX feature mapping (#30801)

charris removed the 09 - Backport-Candidate PRs tagged should be backported label Mar 28, 2026

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