Parameterized-Designs

Verilog designs that are parameterized to fit any value of parameter.

Name		Name	Last commit message	Last commit date
Latest commit History 4 Commits
LICENSE		LICENSE
README.md		README.md
mod_n_counter.v		mod_n_counter.v
n_bit_register_parameterized.v		n_bit_register_parameterized.v
param_up_down_counter.v		param_up_down_counter.v

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