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Add ground pour and multilayer support

enhancement

PCB

Status: Open.

#109 In aktos-io/aecad;

· ceremcem opened on Nov 3, 2023

netlist: cables: Must throw an error if connected via traces

DRCDesign Rule CheckingDesign Rule Checking

enhancement

Status: Open.

#108 In aktos-io/aecad;

· ceremcem opened on Jul 19, 2023

Rotated traces may trigger false "short circuit" errors

bug

Status: Open.

#107 In aktos-io/aecad;

· ceremcem opened on Oct 14, 2022

Display iface alias of a component pad if it belongs to a subcircuit

enhancement

Status: Open.

#102 In aktos-io/aecad;

· ceremcem opened on Sep 26, 2022

Support exchanging a BOM part

enhancement

Status: Open.

#100 In aktos-io/aecad;

· ceremcem opened on Sep 23, 2022

Component upgrade throws a false "false unused pins" error (non blocker issue)

bug

Status: Open.

#98 In aktos-io/aecad;

· ceremcem opened on Sep 8, 2022

SVG export contains lots of empty <g> attributes

bug

Status: Open.

#96 In aktos-io/aecad;

· ceremcem opened on Sep 7, 2022

.netlist syntax should support declaring "connection name"s in value field

enhancement

Status: Open.

#93 In aktos-io/aecad;

· ceremcem opened on Aug 26, 2022

Add a "Show declared circuits and footprints" button

enhancement

Status: Open.

#92 In aktos-io/aecad;

· ceremcem opened on Aug 26, 2022

Support custom fields for "Quick Labels"

enhancement

Status: Open.

#91 In aktos-io/aecad;

· ceremcem opened on Aug 26, 2022

3D PCB model generation

DRCDesign Rule CheckingDesign Rule Checking

enhancement

Status: Open.

#88 In aktos-io/aecad;

· ceremcem opened on Oct 8, 2021

.cables feature is dangerous

enhancement

Status: Open.

#87 In aktos-io/aecad;

· ceremcem opened on Sep 30, 2021