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logic-gates-simulator

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A C++graph-based Digital Logic Design Environment that lets you build, wire, and evaluate logic circuits made from common gates (NOT, BUFFER, NAND, AND, NOR, OR, XNOR, XOR). Circuits are represented as a graph of gates with an additional wiring system for connecting outputs to inputs across the board,save/load built components with wiring

  • Updated Mar 24, 2026
  • C++

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