Browser-based Arm micro-architecture simulator with single-cycle and pipelined CPU visualization (educational, simulator)

Verilog Implementation of an ARM LEGv8 CPU

LEGv8 CPU implementation and some tools like a LEGv8 assembler

Graphical-Micro-Architecture-Simulator

A LEGv8 Assembly editor and emulator.

Coprocessadores são componentes de hardware que atuam em conjunto com a CPU (Central Processing Unit), oferecendo suporte a tarefas específicas, geralmente com foco em otimização e desempenho. No contexto deste trabalho, foi desenvolvido um coprocessador aritmético voltado para operações matriciais

Simulator for LEG-V8 Assembly in Rust, as well as other tools for facilitating LEG-V8 development.

A LEGv8 Assembly extension for Visual Studio Code.

ARM Assembly Gradient Descent Program

A 5-stage pipelined 64-bit ARM processor; implemented in SystemVerilog

Simplified, monocycle version of the LEGv8 processor designed by PCS Poli-USP and implemented in VHDL for Digital Systems II

Verilog Implementation of an ARM LEGv8 CPU

C++ disassembler for the LEGv8 subset of ARM.

Parser for legv8sim from Nom that converts to an intermediate representation to interpret a legv8 program

My bachelor's thesis @Units

Engineered low-level microcontroller programs for real-time GPIO control, data processing, and registerlevel manipulation. Assembled and configured hardware setups, including microcontroller boards and interfacing GPIO pins with LEDs and buttons

Home for my Verilog labs

A LEGv8 Language Server that implements the Microsof Language Server Protocol.

Insertion Sort implemented in LEGv8 assembly code

Code for COEN122: Computer Architecture